Control Register 0 - Siemens SMP16-SFT251 Technical Description

Counter board with two 32-bit incremental/pulse counters
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SMP16-SFT251
6.4.2

Control Register 0

Control register 0 has a different address depending on the BG_Mode bit in control register 0 (bit 4).
BG_Mode
Address, Control Register 0
0
1
Bit
7
6
Name
REFI0
REFI1
REFI0
Masks out the counter interrupt of channel 0 from group interrupt INT0
0
Counter interrupt channel 0 disabled
1
Counter interrupt channel 0 enabled
REFI1
Masks out the counter interrupt of channel 1 from group interrupt INT0
0
Counter interrupt channel 1 disabled
1
Counter interrupt channel 1 enabled
LAX
Simultaneously masks out the interrupt requests of inputs ZS00, ZS20, ZS01, and ZS21 from
group interrupt INT1
0
INT1 disabled
1
INT1 enabled
BG_Mode
Board mode
Switches the board to SMP16-SFT251 mode. In this mode, the board is no longer compatible
with the SMP-E251. This mode provides an increased scope of functions.
The address location of ASBIC channel 0 differs depending on the status of this bit.
0
SMP16-SFT251 mode off
1
SMP16-SFT251 mode on
EPB0
One-time/cyclic operation of the hardware support, channel 0
0
One-time operation
1
Cyclic operation
HWU0
Hardware support, channel 0
0
With hardware support
1
Without hardware support
EPB1
One-time/cyclic operation of the hardware support, channel 1
0
One-time operation
1
Cyclic operation
HWU1
Hardware support, channel 1
0
With hardware support
1
Without hardware support
©Siemens AG 2003, All Rights Reserved
(4)J31069-D2090-U001-A1-7618
Remarks
w + 6
w + C
Fill bits 8 to 15 with "00hex"
5
4
LAX
BG_Mode
3
2
1
EPB0
HWU0
EPB1
Programming the Board
0
HWU1
45

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