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SMP16-SFT251
3.2.2
Other Special Signals
AEN
BS
Interrupts of the counting channels and extra inputs
INT0*
INT1*
INT2*
INT3*
INT4*
INT5*
INT0oNMI*
NMI*
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Address Enable, input (b3)
Control signal for PC compatible bus accesses, must be connected with AEN
(b3) to the CPU slot for PC-I/O addressing (up to 3FFh).
"Board Select," input, TTL level (c17)
When low, this signal deactivates the board. However, the interrupts of the
board still remain active.
Interrupt output, open collector (c27)
Interrupt output, open collector (c15)
Interrupt output, open collector (c19)
Interrupt output, open collector (c21)
Interrupt output, open collector (c23)
Interrupt output, open collector (c25)
Interrupt output, open collector (c13)
Interrupt INT0* is located here so that it is compatible with the SMP-E251.
This interrupt is identical to the INT0* signal. Modern applications sometimes
use this pin as NMI*. When, for instance, the SMP16-COM595 bus coupler
and the SMP16-SFT251 are installed in the same slot for this reason, the
INT0* signal must be switched off from this pin. See chapter 6.4.5. INT0* can
always be taken from pin c27.
"Non Maskable Interrupt," output, open collector (c13)
Characteristics: low: 0.4 V/8 mA
Signalizes a hardware error of the ASBIC chipc or of the board.
Interfaces
19
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