Programming Model; Mc2 Chip Id Register - Motorola MVME162FX Programmer's Reference Manual

Programming Model

This section defines the programming model for the control and
status registers (CSR) in the MC2 chip. The base address of the CSR
is $FFF42000. The possible operations for each bit in the CSR are as
follows:
The possible states of the bits after local and powerup reset are as
defined below.

MC2 chip ID Register

ADR/SIZ
31
BIT
NAME ID7
OPER R
RESET 1 PL
ID7-ID0
R This bit is a read-only status bit.
R/W This bit is readable and writable.
C Writing a one to this bit clears this bit or another bit. This
bit reads zero.
The bit is affected by powerup reset.
P
The bit is affected by local reset.
L
X The bit is not affected by reset.
0 The bit is always 0.
1 The bit is always 1.
$FFF42000 (8 bits)
30 29
ID6 ID5
R R
0 PL 0 PL
The chip ID number is $84. This register is read only.
It ignores a write but ends the cycle with TA*, i.e.,
the cycle terminates without exceptions.
28 27 26
ID4 ID3 ID2
R R R
0 PL 0 PL 1 PL
Programming Model
25 24
ID1 ID0
R R
0 PL 0 PL
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