Interrupt Clear Register (Bits 16-23) - Motorola MVME162FX Programmer's Reference Manual

Embedded controller
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CTIC2
CVI1E
CPE
CMWP
CSYSF
CAB
CACF

Interrupt Clear Register (bits 16-23)

ADR/SIZ
BIT
23
NAME
CVIA
C
OPER
RESET
X
This register is used to clear the edge-sensitive interrupts. An
interrupt is cleared by writing a one to its clear bit. The clear bits are
defined below.
CLM0
CLM1
CSIG0
CSIG1
CSIG2
CSIG3
CDMA
CVIA
Clear tick timer 2 interrupt
Clear VMEbus IRQ1 edge-sensitive interrupt
Not used on MVME162FX
Clear VMEbus master write post error interrupt
Clear VMEbus SYSFAIL interrupt
Not used on MVME162FX
Clear VMEbus ACFAIL interrupt
$FFF40074 (8 bits of 32)
22
21
20
CDMA CSIG3
CSIG2
C
C
C
X
X
X
Clear GCSR LM0 interrupt
Clear GCSR LM1 interrupt
Clear GCSR SIG0 interrupt
Clear GCSR SIG1 interrupt
Clear GCSR SIG2 interrupt
Clear GCSR SIG3 interrupt
Clear DMA controller interrupt
Clear VMEbus interrupter acknowledge interrupt
LCSR Programming Model
19
18
17
CSIG1
CSIG0
CLM1
C
C
C
X
X
X
2
16
CLM0
C
X
2-89

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