Overview.........................................................................................................1-1
Requirements..................................................................................................1-3
Maps.......................................................................................................1-8
Local Bus Time-out .............................................................................. 1-39
VMEbus BERR* ....................................................................................1-39
VMEchip2.............................................................................................. 1-40
Bus Error Processing............................................................................ 1-40
MPU Parity Error ................................................................................. 1-41
MPU Off-board Error .......................................................................... 1-41
DMAC VMEbus Error ......................................................................... 1-43
..........................................................................................................1-1
...........................................................................................................1-3
......................................................................................................1-5
........................................................................................1-5
Option......................................................................1-6
VMEchip2...............................................................1-7
Map................................................................................1-8
...............................................................................1-37
Considerations....................................................................1-38
......................................................................................................1-38
.........................................................................................1-38
BERR*...............................................................................1-39
Contents
...........................1-41
xi