Table Of Contents - Motorola MVME162FX Programmer's Reference Manual

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Overview.........................................................................................................1-1
Requirements..................................................................................................1-3
Maps.......................................................................................................1-8
Normal Address Range......................................................................... 1-8
Detailed I/O Memory Maps............................................................... 1-13
BBRAM/TOD Clock Memory Map .................................................. 1-31
Interrupt Acknowledge Map.............................................................. 1-37
VMEbus Accesses to the Local Bus ................................................... 1-37
VMEbus Short I/O Memory Map ..................................................... 1-37
Local Bus Time-out .............................................................................. 1-39
VMEbus Access Time-out ................................................................... 1-39
VMEbus BERR* ....................................................................................1-39
Local DRAM Parity Error ................................................................... 1-40
VMEchip2.............................................................................................. 1-40
Bus Error Processing............................................................................ 1-40
MPU Parity Error ................................................................................. 1-41
MPU Off-board Error .......................................................................... 1-41
MPU TEA - Cause Unidentified ........................................................ 1-42
MPU Local Bus Time-out.................................................................... 1-42
DMAC VMEbus Error ......................................................................... 1-43
..........................................................................................................1-1
...........................................................................................................1-3
......................................................................................................1-5
........................................................................................1-5
Option......................................................................1-6
VMEchip2...............................................................1-7
Map................................................................................1-8
...............................................................................1-37
Considerations....................................................................1-38
......................................................................................................1-38
.........................................................................................1-38
BERR*...............................................................................1-39
Contents
...........................1-41
xi

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