Denon DRA-800H Service Manual page 45

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BLOCK DIAGRAM
PCM9211PTR BLOCK DIAGRAM
FILT
AUXIN 0
RXIN 0 RXIN0
RXIN 1 RXIN1
PLL
RXIN 2 RXIN2
RXIN 3 RXIN3
RXIN 4/ASCKI 0 RXIN4
RXIN 5/ABCKI 0 RXIN5 Clock/ Data
Recovery
RXIN 6/ALRCKI 0 RXIN6
RXIN 7/ADIN0 RXIN7
MPIO_ A0
RXIN8
Lock Detection
MPIO_ A1
RXIN9
MPIO_ A
MPIO_ A2
RXIN10
SELECTOR
MPIO_ A3
RXIN11 RECOUT 0
DITOUT RECOUT 1
ADC
VINL
ADC Mode
ADC
VINR Control
VCOM
Com. Supply
MPIO _C0
ADC Standalone
MPIO _C1
MPIO_ C
MPIO _C2
SELECTOR
AUXIN1
MPIO _C3
ADC Clock
(SCK /BCK/LRCK)
Divider
XTI
XTO OSC
XMCKO
(To MPIO _A & MPO0/1 )
XMCKO
Divider
MC /SCL
MDI /SDA Function DIR CS
2
SPI/I C Control ( 48-bit)
MDO /ADR 0
INTERFACE
MS/ADR 1
GPIO/GPO DIT CS
Data ( 48-bit)
POWER SUPPLY
RST
Reset
and Mode ADC DIR
MODE
Set
ANALOG ANALOG
VCCAD AGNDAD VCC
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SBAS495 – JUNE 2010
AUTO
RXIN7
DIR
DIR SCKO
DOUT
ADC MAIN BCK
OUTPUT
AUXIN0 LRCK
SCKO/ BCK/LRCK
PORT
AUXIN1 DOUT
Lock :DIR AUXIN2
Unlock:ADC
AUTO
DIR
ADC
DIT
AUXIN0
AUXIN1
AUXIN2
RECOUT0
MPO 0
RECOUT1 MPO0/1
MPO 1
SELECTOR
DITOUT
AUTO
MPIO_B0
DIR
MPIO_B1
ADC
AUXOUT MPIO _B
MPIO_B2
AUXIN0
SELECTOR
AUXIN 2
MPIO_B3
AUXIN1
SBCK /SLRCK
Secondary BCK / LRCK
( to MPIO_A )
Divider
Selector
REGISTER EXTRA DIR FUNCTIONS
ERROR /INT0
DIR DIR NPCM /INT1
ERROR DETECTION
P and P f Calculator
C D S
Non-PCM DETECTION
f Calculator
S
MPIO_ A
All Port Flags
DIR Interrupt
f Calculator MPIO_ B
S
DTS-CD/LD Detection
Validity Flag MPIO_ C
User Data
MPO0
Channel Status Data
MPO1
BFRAME Detection
DIR
ALL
ANALOG Interrupt System
AGND VDDRX GNDRX DVDD DGND
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PCM9211
ADSP21487KSWZ2B (DIGITAL_DSP : IC781)
Pin Name
SDDQM
MS0
SDCKE
V
DD _ INT
CLK_CFG1
ADDR0
BOOT_CFG0
V
_
DD EXT
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
BOOT_CFG1
GND
ADDR6
ADDR7
NC
NC
ADDR8
ADDR9
CLK_CFG0
V
_
DD INT
CLKIN
XTAL
ADDR10
SDA10
V
DD _ EXT
V
DD _ INT
ADDR11
ADDR12
ADDR17
ADDR13
V
_
DD INT
ADDR18
9
RESETOUT/RUNRSTIN
V
DD _ INT
DPI_P01
DPI_P02
DPI_P03
V
_
DD INT
DPI_P05
DPI_P04
DPI_P06
45
176 133
132
1
PIN 1
GND PAD
(PIN 177)
at BOTTOM
TOP VIEW
(PINS DOWN)
44 89
45
88
Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name
1 V 45 DAI_P10 89 V
_ _
DD EXT DD INT
2 DPI_P08 46 V 90 FLAG0
_
DD INT
3 DPI_P07 47 V 91 FLAG1
DD _ EXT
4 V 48 DAI_P20 92 FLAG2
DD _ INT
5 DPI_P09 49 V 93 NC
DD _ INT
6 DPI_P10 50 DAI_P08 94 FLAG3
7 DPI_P11 51 DAI_P14 95 NC
8 DPI_P12 52 DAI_P04 96 NC
9 DPI_P13 53 DAI_P18 97 V
_
DD EXT
10 DPI_P14 54 DAI_P17 98 NC
11 DAI_P03 55 DAI_P16 99 V
_
DD INT
12 NC 56 DAI_P12 100 TRST
13 V 57 DAI_P15 101 NC
_
DD EXT
14 NC 58 V 102 EMU
_
DD INT
15 NC 59 DAI_P11 103 DATA0
16 NC 60 V 104 DATA1
DD _ EXT
17 NC 61 V 105 DATA2
DD _ INT
18 V 62 BOOT_CFG2 106 DATA3
DD _ INT
19 NC 63 V 107 TDO
_
DD INT
20 NC 64 AMI_ACK 108 DATA4
21 V 65 GND 109 V
_ _
DD INT DD EXT
22 NC 66 THD_M 110 DATA5
23 NC 67 THD_P 111 DATA6
24 V 68 V 112 V
_ _ _
DD INT DD THD DD INT
25 NC 69 V 113 DATA7
_
DD INT
26 WDTRSTO 70 V 114 TDI
DD _ INT
27 NC 71 MS1 115 SDCLK
28 V 72 V 116 V
DD _ EXT DD _ INT DD _ EXT
29 DAI_P07 73 WDT_CLKO 117 DATA8
30 DAI_P13 74 WDT_CLKIN 118 DATA9
31 DAI_P19 75 V 119 DATA10
_
DD EXT
32 DAI_P01 76 ADDR23 120 TCK
33 DAI_P02 77 ADDR22 121 DATA11
34 V 78 ADDR21 122 DATA12
_
DD INT
35 NC 79 V 123 DATA14
_
DD INT
36 NC 80 ADDR20 124 DATA13
37 NC 81 ADDR19 125 V
DD _ INT
38 NC 82 V 126 DATA15
DD _ EXT
39 NC 83 ADDR16 127 SDWE
40 V 84 ADDR15 128 SDRAS
DD _ EXT
41 V 85 V 129 RESET
_ _
DD INT DD INT
42 DAI_P06 86 ADDR14 130 TMS
43 DAI_P05 87 AMI_WR 131 SDCAS
44 DAI_P09 88 AMI_RD 132 V
_
DD INT
GND
Pin No.
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177*
* at BOTTOM