Appendix B. Memory Population Rules; Ddr5 Dimm Population Rules; Intel® Optane™ Persistent Memory (Pmem) 300 Series Module Rules - Intel M50FCP1UR Manual

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Intel® Server System M50FCP1UR System Integration and Service Guide
B.1

DDR5 DIMM Population Rules

Note: Although mixed DDR5 DRAM DIMM configurations are supported, Intel only performs platform
validation on systems that are configured with identical DIMMs installed.
The following memory population rules apply when installing DDR5 DIMMs:
Mixing rules:
o Mixing DDR5 DIMMs of different frequencies and latencies is not supported within or across
processors. If a mixed configuration is encountered, the BIOS attempts to operate at the highest
common frequency and the lowest latency possible.
o x4 and x8 width DIMMs may be mixed in the same channel.
o Mixing of DDR5 DIMM types (standard RDIMM, 3DS-RDIMM, 9x4 RDIMM) within or across
processors is not supported. This is a Fatal Error Halt in Memory Initialization.
For a single DDR5 DIMM in a dual-slot channel, populate slot 1 (blue slot).
For multiple DDR5 DIMMs per channel:
o When populating a quad-rank DDR5 DIMM with a single- or dual-rank DDR5 DIMM in the same
channel, the quad-rank DDR5 DIMM must be populated farthest from the processor. Incorrect
DIMM placement results in an MRC error code. A maximum of 8 logical ranks can be used on any
one channel, as well as a maximum of 10 physical ranks loaded on a channel.
o For RDIMM, 3DS-RDIMM, 9x4 RDIMM, always populate DIMMs with higher electrical loading in slot
1 (blue slot) followed by slot 2 (black slot).
Memory slots associated with a given processor are unavailable if the corresponding processor
socket is not populated.
Processor sockets are self-contained and autonomous. However, all memory subsystem support
(such as memory RAS and error management) in the BIOS Setup are applied commonly for each
installed processor.
For best system performance, memory must be installed in all eight channels for each installed
processor.
For best system performance in dual processor configurations, installed DDR5 DIMM type and
population for DDR5 DIMMs configured to CPU 1 must match DDR5 DIMM type and population
configured to CPU 0.
B.2
Intel® Optane™ Persistent Memory (PMem) 300 Series Module Rules
Only Intel Optane PMem 300 series modules are supported. Previous Intel Optane PMem generations
(such as 100 series and 200 series) are not supported.
Intel Optane PMem 300 series modules of different capacities cannot be mixed within or across
processor sockets.
Memory slots supported by Integrated Memory Controller 0 (memory channels A and B) of a given
processor must be populated before memory slots on other IMCs.
For multiple DIMMs per channel:
o Only one Intel Optane PMem 300 series module is supported per memory channel.
o Intel Optane PMem 300 series modules are only supported in memory module slot 2 (black slot)
when mixed with standard RDIMM, 3DS-RDIMM, 9x4 RDIMM.
No support for SDRAM SRx8 DIMM that is populated within the same channel as the Intel Optane
PMem 300 series module in any operating mode.
94

Appendix B. Memory Population Rules

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