Global Swap Lock On Multiple Gpus; Table 3-13 Global Swap Lock On Multiple Gpus - AMD Vega 10 Data Book

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3.12 Global Swap Lock on Multiple GPUs

Global swap lock is used to synchronize the timing and surface flip for multiple display
pipes on multiple GPUs.
If this feature is not required, the following signals can be used as 3.3-V GPIOs or left
unconnected on the PCB.
Table 3–13 Global Swap Lock on Multiple GPUs
Pin Name
GENLK_CLK
GENLK_VSYNC
SWAPLOCKA
SWAPLOCKB
"Vega 10" Databook
56006_1.00
Type
PD/
PU
I/O
Reference-clock input for the display PLLs (including the DCPLL
and pixel PLLs) received from the framelock/genlock interface.
3.3 V
PD
Note: Can be unconnected if not used.
(VDDAN_33)
I/O
Frame-timing indicator.
3.3 V
PD
Output to the framelock/genlock interface.
(VDDAN_33)
(Optional) Used in a multiple GPU design with multiple display
outputs to allow all displays in group A to update at the same time
and have synchronous left/right stereo timing.
In a multiple GPU design where displays are connected to more
Open drain
than one GPU, connect SWAPLOCKA from all GPUs together with
-
an external 10-kΩ pull-up resistor.
3.3 V
GPU genlock is needed, either via a genlock system or by feeding
all GPUs with the same reference clock.
Connecting SWAPLOCKB is preferred but not required.
(Optional) Used in a multiple GPU design with multiple display
outputs to allow all displays in group B to update at the same time
and have synchronous left/right stereo timing.
Open drain
In a multiple GPU design where displays are connected to more
-
than one GPU, connect SWAPLOCKB from all GPUs together with
3.3 V
an external 10-kΩ pull-up resistor.
GPU genlock is needed, either via a genlock system or by feeding
all GPUs with the same reference clock.
Signal Descriptions
Description
© 2017 Advanced Micro Devices, Inc.
AMD Confidential - Do not duplicate.

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