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Configuring the HP Processor Probe for PowerPC 603/603e
The current mask rev dd1 of the 603e silicon does not work in debug mode
with either cache enabled. The cache configuration items have no effect with
the current 603e silicon.
The general configuration commands and their default values are:
•
cf rrt - restrict to real-time runs
Default: yes
•
cf reset - selects the action desired for the reset command
Default: runrom
•
cf speed - set the speed of the JTAG clock
Default: 1 (fastest speed)
•
cf parity - generate parity bits on memory operations
Default: off (no parity bits generated)
•
cf mrddel - set memory read delays
Default: 0 (no delay)
•
cf mwrdel - set memory write delays
Default: 0 (no delay)
•
cf 32bitmode - set 32-bit data bus size
Default: off (64-bit data bus)
•
cf breakin - set BNC break in operation
Default: off (BNC input ignored)
•
cf trigout - set BNC trigger out operation
Default: fixhigh (BNC trigger out always high)
The cache configuration commands and their default values are:
•
cf drtry - enable data retry mode of processor (603 only)
Default: off (do not use data retry mode)
•
cf mrdop - configure the memory read operation
Default: mm (memory model, reads from cache if valid)
•
cf dmwrop - configure the data memory write operation
Default: mm (memory model, writes to cache if valid)
•
cf imwrop - configure the instruction memory write operation
Default: upd_dcu (instruction cache update, data cache update)
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