Tab 6 Settings - Texas Instruments ADS126 EVM-PDK Series User Manual

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3.4.6
Tab 6: Test DAC
The Test DAC tab, as shown in
functionality by providing a known dc input voltage. The test DAC has two resistor divider taps that select
a fraction of the supply voltage. To use the test DAC, first select the Pos. Test Signal Supply Ratio and
Neg. Test Signal Supply Ratio settings, and then connect the test DAC to ADC1, ADC2, or both, with the
Test DAC to ADCx controls or with the MUX controls on tab 1 (Input MUX). Additionally, the test DAC
voltages are provided as outputs on pins AIN6 and AIN7 to be measured externally.
The Test DAC Calculator is provided to calculate the test DAC output and ADC input voltages based on
the supply ratios, AVDD, AVSS, and PGA gain settings. As an example, using the following settings:
Pos. Test Signal Supply Ratio = 0.525
Neg. Test Signal Supply Ratio = 0.475
Test DAC to ADC1 = Input to ADC1 (to select the Test DAC as the input source for ADC1)
PGA1 Gain = 1 V/V (on tab 1)
For a supply voltage of 5 V (AVDD – AVSS), the test DAC outputs (5 V) × (0.525 V – 0.475 V) × (1 V/V) =
0.25 V to ADC1.
To output or measure the test DAC voltage externally, set the Test Signal Outputs drop-down menu to
Connected to AIN6/AIN7.
NOTE: The test DAC is susceptible to power supply noise. Allow a sufficient margin of error when
verifying ADC conversion results with the test DAC.
Create a ratiometric measurement of the test DAC by selecting the analog supply as the
voltage reference source for the ADC. Then the matching input and reference noise cancels
in the ADC conversion result.
NOTE: The software does not allow for simultaneous GPIO, Test DAC, IDAC, or VBIAS functions to
be enabled on the same pin.
SBAU206 – April 2015
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Figure
20, controls the internal test DAC and is used to verify ADC
6
Test DAC
Figure 22. Tab 6 Settings
Copyright © 2015, Texas Instruments Incorporated
ADS126xEVM Software
25
ADS126xEVM-PDK

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