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Technical Reference—Crystal Forest
Signal
I/O
Default
Name
Type
Mode
2
GPIO43
I/O
Native
GPIO44
I/O
Native
GPIO45
I/O
Native
GPIO46
I/O
Native
GPIO47
I/O
Native
SDATAOU
I/O
GPI
T1/
GPIO48
SATA5_GP
I/O
GPI
/
TEMP_ALE
RT#/
GPIO49
2
GPIO50
I/O
Native
BBS1/
I/O
BBS1
GPIO51
2
GPIO52
I/O
Native
October 2012
Order No.: 328009-001US
Ball
Default
Power
Coun
Direction
Well
t
and Logic
State
1
I
SUS
1
I
SUS
1
I
SUS
1
I
SUS
1
I
SUS
1
I
CORE
1
I
CORE
1
I
CORE
1
O (High)
CORE
1
I
CORE
®
®
Intel
Xeon
Processor E3-1125C with Intel
Internal/
External
Resistor Pull-
Up/Down
3. OC#[3:0] can only be used for EHCI
controller #1
General Purpose I/O Port 43. Not
Multiplexed
General Purpose I/O Port 44. Not
Multiplexed
General Purpose I/O Port 45. Not
Multiplexed
General Purpose I/O Port 46. Not
Multiplexed
General Purpose I/O Port 47. Not
Multiplexed
SATA Serial GPIO Data Out 1. Driven by
the controller to indicate the drive status
in the following sequence: drive 4,
5...4,5...
If SDATAOUT1 interface is not used, this
signal can be used as a GPIO Port 48.
Serial ATA 5 General Purpose. This is an
input pin which can be configured as an
interlock switch corresponding to SATA
Port 5. When used as an interlock switch
status indication, this signal should be
drive to '0' to indicate that the switch is
closed and to '1' to indicate that the
switch is open.
Temperature Alert. Used as an alert
(active low) to indicate to the external
controller (such as, EC or SIO) that
temperatures are out of range for the
PCH or Memory Controller or the
processor core.
If interlock switches or Temp Alert are
not required, this pin can be configured
as GPIO Port 49.
General Purpose I/O Port 50. Not
Multiplexed
Weak internal
BIOS Boot Strap 1.
pull-up
BBS1
0
0
1
1
If BBS1 interface is not used, the signals
can be used as GPIO Port 51.
General Purpose I/O Port 52. Not
Multiplexed.
®
Communications Chipset 8910 Development Kit
Description
3
3
3
3
3
3
BBS0
0
Not valid
1
Not valid
0
Not valid
1
SPI boot
3
continued...
User Guide
49
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