ECS P6EXP-Me Manual page 26

CPU-To-PCI IDE Posting
If you enable this item, the system will use a fast buffer for posting writes to memory. This
allows release of the CPU before completion of the write cycle.
System BIOS Cacheable
This item allows the system BIOS to be cached for faster performance. We recommend
that you leave this item at the default value Enabled.
Video BIOS Cacheable
This item allows the video BIOS to be cached for faster performance. We recommend that
you leave this item at the default value Disabled.
8 Bit I/O Recovery Time
8 Bit I/O Recovery Time
These two items set timing parameters for 8-bit and 16-bit ISA expansion cards. We
recommend that you leave these items at the default value 1.
Memory Hole at 15M-16M
This item can be used to reserve memory space for some ISA cards that require it. We
recommend that you leave this item at the default value Disabled.
Passive Release
When enabled. CPU to PCI bus accesses are allowed during passive release.
Delayed Transaction
If the chipset has an embedded 32-bit write buffer to support delay transaction cycles, you
can enable this item to provide compliance with PCI Ver. 2.1 specifications. We
recommend that you leave this item at the default value Disabled.
Support PCI 2.1
You can enable this item if your system chipset supports all the operations of the PCI Ver.
2.1 specifications. We recommend that you leave this item at the default value Disabled.
AGP Aperture Size
This item defines the size of the aperture if you use an AGP graphics adapter. It refers to a
section of the PCI memory address range dedicated for graphics memory.
SDRAMRAS to CAS Delay
For SDRAM memory, this item defines the delay between the Row Address Strobe (RAS)
and Column Address Strobe (CAS) signals. A shorter delay gives better performance and a
longer delay improves stability. We recommend that you leave this item at the default
value Slow.
SDRAM RAS Precharge Time:
For SDRAM, the precharge time defines the number of clock cycles used by the Row
Address Strobe (RAS) to accumulate charge for a refresh. If insufficient time is allowed,
the refresh may be incomplete and data can be lost. We recommend that you leave this
item at the default value Slow
SDRAM CAS Latency
This item defines the timing for SDRAM memory. Leave this item at the default value.
Default: Enabled
Default: Enabled
Default: Disabled
Default: 1
Default: 1
Default: Disabled
Default: Enabled
Default: Enabled
Default: Disabled
Default: 64
Default: Slow
Default: Slow
Default: 3T
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