List Of Functions For Each Cpu Module - Mitsubishi Electric Q Series Reference Manual

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2 SYSTEM CONFIGURATION

2.2.3 List of functions for each CPU module

Cyclic transmission function
MELSECNET/H Extended mode
Refresh parameter
Common parameter
Station inherent parameter
Inter-link data transfer function
Designation of I/O master station
Designation of reserved station
Low-speed cyclic transmission function
Redundant system function
Transient transmission function
Routing function
Group function
Message sending function using logical channel numbers
Link dedicated instruction
RAS function
Automatic return function
Control station shift function
Control station return control function
Loopback function
Station detach function
Transient transmission possible even in case of CPU error
Confirmation of transient transmission error detection time
Module diagnosis
Network test
Network diagnosis
Direct accessing of link device
Clock setting to a station on the network by GX Developer
Getting the interrupt sequence program started
Multiplexed transmission function
Simplified redundant setting of network
Increasing the number of send points by connecting multiple
modules of the same network number
*1: Up to 8 modules can be set.
*2: The low-speed LB/LW cannot be set because these models do not support the low-speed cyclic transmission function.
*3: The SREAD/SWRITE instruction's read/write notice device (D3) becomes invalid. (The same operation as the
READ/WRITE instructions takes place.)
*4: It is available for the Basic model QCPU of function version B or later.
*5: Available for the Universal model QCPU whose serial No. (first 5 digits) is "09042" or later.
*6: For link dedicated instruction for the safety CPU, refer to Section 6.3.
*7: Basic model QCPU and safety CPU cannot execute a network test on a sequence program.
2 - 18
The available functions of the MELSECNET/H depend on the CPU module to which a
network module is mounted.
Function
1)High Performance model QCPU, Process CPU
2)Basic model QCPU
3)Redundant CPU
4)Universal model QCPU
5)Safety CPU
CPU module
1)
2)
3)
*1
*2
*1
*3
*7
*4
MELSEC-Q
Reference
section
4)
5)
Section 3.2.1
Section 5.1
*1
Section 5.7
*2
Section 5.3
Section 5.6
*5
Section 7.2
Section 5.3.3
Section 5.3.4
*5
Section 7.3
Section 7.10
Section 7.4
*1
Section 7.4.2
Section 7.4.3
Section 7.4.4
*3*6
Section 7.4.5
Section 3.2.2
Section 3.2.2
Section 3.2.2
Section 3.2.2
Section 3.2.2
Section 3.2.2
Section 3.2.2
Section 3.2.2
Section 3.2.2
*5
*7
Section 7.8
Section 8.1
Section 7.1
Section 7.4.6
Section 7.5
Section 7.6
Section 7.7
Section 7.9
: Available,
: Unavailable
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