Rf Interface Block; Fig 14 Keyboard Layout - Nokia RH-9 Series Ccs Technical Documentation

CCS Technical Documentation
The matrix detection requires that 2 lines are pulled low at the same time. The matrix
contains 15 keys. The 6 individual keys are detected by simple high to low transition
interrupt.
When the key has been detected all the keypad-register inside the UPP is reset and it's
ready receiving new interrupt.

RF Interface Block

The interface between the baseband and the RF can be divided into three categories:
• The digital interface from the UPP to the RF ASIC (Mjoelner). The serial digital
interface is used to control the operation of the different blocks in the RF ASICs.
• The analogue interface between UEM and the RF. The analogue interface consists
of RX and TX converter signals. The power amplifier control signal TXC and the
AFC signal comes as well from the UEM.
• Reference clock interface between Mjoelner and UPP which supplies the 26Mhz
system clock for the UPP.
Reference clock interface between Mjoelner and UPP
Main requirements on the UPP input voltage are:
• The maximum peak-peak voltage is 0.8*Vdd, even when Mjoelner is in
RESET state (maximum drive level).
• The minimum voltage is 300mVpp.
• The third harmonic content is specified to be below –10dBc.
DC level shifts coming from the Mjoelner side should "disappear quickly" on the UPP side.
DC level shifts coming from the Mjoelner side should "disappear quickly" on the UPP side.
These requirements must be met over temperature, voltage, and component lot varia-
tions.
The picture below shows a schematic of the used interface.
C420 = 47pF, C426 = 1nF, R420 = 1k Ω , and R2426 = 1k Ω
Issue 1 11/02
C420
R420
R426
C426
ãNokia Corporation
RH-9
System Module & UI
Page 43