Table Of Contents; Dram R/W Leadoff Timing - ECS P5HX-A User Manual

P5HX-A
Chipset Features Setup
Auto Configuration
DRAM Timing
DRAM RAS# Precharge Time : 4
DRAM R/W Leadoff Timing
Fast RAS# To CAS# Delay
DRAM Read Burst <EDO/EPM>: x222/x333
DRAM Write Burst Timing
DRAM Speculative Leadoff : Enabled
Turn-Around Insertion
ISA Clock
Turbo Read Leadoff
System BIOS Cacheable
Video BIOS Cacheable
8 Bit I/O Recovery Time
16 Bit I/O Recovery Time : 1
Memory Hole At 15M-16M
Peer Concurrency
Chipset Special Features : Enabled
DRAM ECC/PARITY Select
Figure 3 -4. Chipset Features Setup Screen
Auto Configuration - The default values of this options is
When enabled, this options is for the following DRAM and cache options.
Otherwise, isabled" allows you to program each option .
•
Enabled (default)
The following items are controlled by Auto Configuration when users select
nabled". For this reason, their default values will be changed by the speed of
CPU. These items are :
RAM RAS# Precharge Time" ,
RAS# to CAS# Delay",
Burst Timing"
SA Clock".
DRAM Timing - Configures the DRAM read/write timing for the maximum
performance. The available options are:
•
<70ns (default)
DRAM RAS# Precharge Time - Selects RAS# precharge time for DRAM access.
The available options are:
•
4 (default)
DRAM R/W Leadoff Timing - Determines the leadoff time for R/W to the cache.
The available options are:
•
7/6 (default)
User's Manual 1-26
OM PCI/ISA BIOS <<P5HX-A>>
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
: Enabled Memory Parity/ECC Check
: <70ns
L2 Cache Cacheable Size
: 7/6 Chipset NA# Asserted
: 3
: x333
: Disabled
: PCICLK/4
: Disabled
: Enabled
: Enabled
: 1
: Disabled
ESC : Quit
: Enabled F1 : Help
F5 : Old Values
: Parity F6 : Load BIOS Defaults
F7 : Load Setup Defaults
•
Disabled
RAM R/W Leadoff Timing", "
RAM Read Burst <EDO/EPM>",
RAM Speculative Leadoff",
•
<60ns
•
3
•
6/5
: Disabled
: 64MB
: Enabled
↑↓→←: Select Item
PU/PD/+/- : Modify
(Shift)F2 : Color
nabled" (default).
ast
RAM Write
urn-Around Insertion" and