Motorola ASTRO XTL 5000 Basic Service Manual page 49

Basic Theory of Operation: 700–800 MHz Receiver Overview
3.13 700 800 MHz Receiver Overview
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The receiver circuits primary duties are to detect, filter, amplify, and demodulate RF signals in the
presence of strong interfering noise and unintended signals. The receiver is broken down into the
following blocks:
• Front-end (preselector and LNA)
• Mixer
• IF
• Back-end
3.13.1 Receiver Front-End
The 700–800 MHz receiver front-end operates in two bands. The primary function of the receiver
front-end is to optimize image rejection and selectivity while providing the first conversion. The front-
end uses ceramic-filter technology and includes a wideband, monolithic amplifier. The first filter is a
dual-switched filter that reduces the image frequency response and limits some of the out-of-band
interference. The second filter following the monolithic Low Noise Amplifier (LNA) provides additional
image rejection.
3.13.2 Mixer
The receiver front-end signal is fed to the monolithic Mixer IC where it is down converted to an IF of
73.35 MHz. The mixer is designed to provide low conversion loss and high intermodulation
performance. The mixer is driven by the receiver injection buffer, a two-stage discrete IC design used
with the receiver VCO to efficiently drive the mixer over a wide temperature range with minimum
power variation. The injection buffer provides 15 dBm to the mixer. The VCO performs low-side
injection for the 800 MHz band and high-side Injection for the 700 MHz band. The design maintains
temperature stability, low insertion loss, and high out-of-band rejection.
3.13.3 IF Circuitry
The crystal filters provide IF selectivity and out-of-band signal protection to the back-end IC. Two
2-pole crystal filters centered at 73.35 MHz that are isolated from one another by a stable, moderate-
gain amplifier are used to meet the receiver specifications for gain, close-in intermodulation
rejection, adjacent-channel selectivity, and second-image rejection.
3.13.4 Receiver Back-End
The output of the IF circuit is fed directly to the back-end receiver IC. This IC uses a variable-
bandwidth bandpass Sigma-Delta architecture. It is capable of down-converting analog as well as
digital RF protocols into a baseband signal transmitted on the Synchronous Serial Interface (SSI)
bus. It also converts the 73.35 MHz signal from the IF section down to 2.25 MHz using a second LO
frequency of 71.1 MHz or 75.6 MHz. The second LO VCO is tuned to 71.1 MHz (low side) or
75.6 MHz (high side injection). The choice of frequency depends on known spurious interference
related to the programmed received frequency.
6871769L01-A
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October 30, 2006