Motorola ASTRO XTL 5000 Basic Service Manual page 47

Basic Theory of Operation: VHF Receiver Overview
3.11 VHF Receiver Overview
The primary duties of the receiver circuits are to detect, filter, amplify, and demodulate RF signals in
the presence of strong interfering noise and unintended signals. The receiver contains the following
blocks:
• Front-end (preselectors and LNAs)
• Mixer
• IF
• Back-end
3.11.1 Receiver Front-End
The VHF receiver operates in the frequency range of 136 to 174 MHz. The primary function of the
receiver front-end is to optimize the rejection of the image frequency and other out-of-band
frequencies while providing low-noise amplification of the received signal. The front-end uses
discrete fixed-tuned filters and discrete bipolar LNAs. The front-end has two possible configurations:
standard mode, which provides the best intermodulation performance, and the optional pre-amp
mode, which provides improved sensitivity at the cost of slightly reduced intermodulation
performance. The front-end line-up for standard mode is: a switched 15 dB attenuator for AGC
purposes, a 4-pole Chebyshev bandpass filter, a low-noise amplifier, and a 6-pole elliptic bandpass
filter. In pre-amp mode, a 2-pole highpass filter and an additional LNA is added between the
attenuator and the first bandpass filter by means of discrete PIN diode switches.
3.11.2 Mixer
The receiver front-end signal is fed into a discrete double-balance mixer where it is down-converted
into an intermediate frequency (IF) of 109.65 MHz. The mixer consists of two balun transformers and
a octo-quad diode ring. This configuration allows high-level local oscillator (LO) injection, thus
maximizing intermodulation performance. The mixer is driven by the receiver injection buffer, which
consists of three discrete stages designed to provide a stable injection level of +20 dBm. The
synthesizer performs high-side injection to the mixer.
3.11.3 IF Circuitry
The crystal filters provide IF selectivity and out-of-band signal protection to the back-end IC. The use
of two 2-pole crystal filters centered at 109.65 MHz, which are isolated from one another by a
discrete IF amplifier, enable the receiver to meet specifications for gain, close-in intermodulation
rejection, adjacent channel selectivity, and second-image rejection.
3.11.4 Receiver Back-End
The output of the IF circuit is fed directly to the back-end receiver IC. This uses a variable-bandwidth
bandpass sigma-delta architecture. It is capable of down-converting analog, as well as digital, RF
protocols into a baseband signal, which is then transmitted over the Synchronous Serial Interface
(SSI) bus. It also converts the 109.65 MHz signal from the IF section down to 2.25 MHz using a
second LO frequency, which is produced by the second LO VCO. This VCO runs at 107.4 (low-side
injection) or 111.9 MHz (high-side injection). The choice of frequency depends on known spurious
interference related to the programmed received frequency.
6871769L01-A
3-25
October 30, 2006