Sony HDCU3300 Maintenance Manual page 218

SDI_VF-NML_out
DPR
SDI_VF-X3_out
IC301-303
Frame-Timing_in
10
CCU-RETA-Y in
10
CCU-RETA-Cd in
Latch
ADV-F_in
ADV-H_in
74MHz
Co-Pro-CS1_in
74MHz
Clock
SDP-74M-CLK_in
Driver
LinkA-OE-out
IC304,IC319,
IC320,IC321
700P-CCU-Data_in
AUDIO-TX12-PGM_in
AUDIO-TX34-Spare_in
AUDIO-TX56-Incom_in
Buff
AUDIO-TX78-TRUNK_in
AUDIO-TX-64FS_in
AUDIO-TX-LRCK_in
IC305
Co-Pro-IRQ_out
AUDIO-RX12-MIC_out
AUDIO-RX34-AES_out
Buff
AUDIO-RX56-Incom_out
AUDIO-RX78-TRUNK_out
700P-CHU-Data_out
IC204
700PRTC_RX
SDP-Conf-Done_out
Co-Pro-CS0_in
LD-OFF/ON_in
IC310
PLD-ReConfig_in
IC309 OR
Power
On
Reset
IC306
IC307
4
FRONT-TDI_in
FRONT-TDO_out 4
4 5
2:1
ROM
From AVP
FRONT-TMS_in 4
FRONT-TCK_in
EPR-TDI_in
EPR-TDO_out
CN301
EPR-TMS_in
EPR-TCK_in
SDP-EPR-EN_in
Co-Pro-Data(0-7)_in/out 8
Co-Pro-STAT(0-1)_in 2
Co-Pro-STROBE_in STROBE
CPU-CLK
CPU-CLK_in
SDP-RESET_in
IC312 (1/2)
10
Y 10
10
Cd 10
Wide Command
F
Co-Pro
Audio,Command H
CS1
Mux
74MHz
RESET
CCU_BUS
COM
74MHz
700PRTC_TX
4
AUTX-(1-8)
64FSCK
64FSCK LRCK
LRCK
RX_XIRG
4 AURX-(1-8)
IC203
Y
10 10 Y
Cd 10 Cd
10
F F
Wide Command
Demux
H
H Audio Sep,
&
Command Sep
74MHz
F-acum F-acum
Detect
74CK 12
CCU_BUS
COM
CS0
10
Y 10
10
Cd 10
Delay
F &
F,H
H
Displace
12
74CK
12 CCU_BUS
OTR
PLD2_cfg-DONE
Address
CS0
Decoder
5
CCU_BUS
12
PLD2
CS0 IIC
12 CCU_BUS Data,CPU-CLK 9
IC312(2/2)
PLD1_cfg-DONE
5
Data Data
8 8
3STATE
I/O
PLD1-2/2
T/R
8
Data
2
STAT 2 Address
Decoder
STROBE
Data
WR
STAT 2
R/W
RD
Decoder
CS
RESET
6-16
SDP-15 SDP-15
IC401,
Q401-406
HD-SDI
2
2:1
HD- SDI
2
HD-SDI
X301
VCO
GO1525
VF_SEL(0-1)
IC313
Y
10
2
RET-A
Cd 10
P/S Conv.
HD-SDI
74MHz
Mux
RESET
RET-A-LOCK
PLD1-1/2
X201
VCO
GO1525
IC201
10 C1-Y
2
10 C1-Cd
MAIN-CH1(C1)
S/P Conv.
74MHz
HD-SDI
C1-ERR,C1-LOCK
RESET
2
RESET
SDI_5_out
2
Y
SDI_6_out
2
Cd
SDI_1_out
2
DPR
F
SDI_2_out
H
SDI_3_out
74MHz
SDI_4_out
OTR-ADDR(0-3)
17
4
2
OTR-RD,WR
OTR-SDA,SCL 2
3
DAC-SDA,SCL,LD
OTR_CS,
2 (+)1mA/(-)1mA_out
RST-OTR
OTR-RCFG (+/-)1mA-DETECT_out
OTR-DONE FB_CNCT
VF_SEL(0-1)
ANA_SEL(0-1)
Standby-Incom-RX(frCHU)_out
C1-ERR,C1-LOCK
PIO
RET-A-LOCK
Standby-Incom-TX(toCHU)_in
FAN_ALM
FB_CNCT
700/900
STBY-CALL
PWR_OK/NG
Power Diag
IC9-10,Q8
6-16
2
FB_CNCT
OTR-RCFG
OTR-DONE
+5.5V
L401
LPF
D401-402
DROP
FAN_ALM
IC408
2
1:2
2
OTR_Temp
2
SDP_Temp
IC106
Temperature
Senser
IC108
D/A Conv.
PD-MONI
-Level
IC104-105,
Q103-106,D101-103
CN103
Cable Connection
CHU-Sense_in
Detector
CN
Standby-Incom_out
IC101-103,
Q101-102
700/900
STBY-CALL
Stanby_Call
Detector
RET-VF_out
RET-A_out
MAIN-CH1(C1)_in
MAIN-CH2(C2)_in
CN401
MAIN-CH3(A1)_in
MAIN-CH4(A2)_in OTR
MAIN-CH5(B1)_in
MAIN-CH6(B2)_in
OTR-CPU_BUS
SDA,SCL
LASER_ON
FIBER_CON
RE_CFG
CFG_DONE
TEMP_SENSE
+5.5V for OTR
L402-403
LPF FAN_+5V-out
FAN_ALARM-in
SDP-ID(0-1)_out
IC107 IC104
Buff PD-Level-out
ANA_SEL(0-1)
+3.3V
CN104
2
Ether
CN
CN
2
From
CN105
VIF borad
OPTICAL INTERFACE
SDP-15
HDCU3300/MM (J,E)