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¦ 2MB
¦ 4MB
¦ 8MB
¦
+------------------------------------------------------------------------+
Note:
If a system with only one 2MB kit or one 4MB kit installed detects
a memory failure, the system memory diagnostic cannot reconfigure
the system to disable the failing memory.
configurations and should be avoided.)
If POST detects an error in the first bank of system-board memory, that
bank is disabled.
If additional system-board memory is installed, the
addresses assigned to the deactivated banks are reassigned to the next
usable bank of system-board memory and a POST error code is displayed.
If an additional bank of system-board memory is installed, the
customer-level diagnostic programs (on the default hard disk drive) can be
run to deactivate the defective bank and reassign the memory addresses.
The system can then operate with reduced memory capacity.
bank will then be ignored by POST during subsequent power-on operations.
If additional system-board memory is not installed, no address
reassignment can occur and the system cannot be used.
Type 3 Processor Boards:
interleaved memory configurations.
(70ns) memory-module kits are supported, but not a combination of both.
If the system has parity memory installed, the system will operate as
described under Memory (Type 1 Processor Boards).
cause a blank screen.
cannot be displayed.
If the system has ECC memory installed, the system will display POST
errors only if the errors are not correctable.
error occurs, the error will be corrected and the system will continue to
operate without interruption.
Note:
If a system with only two 1MB kits (one 2MB block) or two 4MB kits
(one 8MB block) installed detects a memory failure, the system
memory diagnostics cannot reconfigure the system to remove the
failing memory.
be avoided.)
IBM PS/2 Model 90 XP 486 and 95 XP 486 HMR
Memory Errors
¦ 1MB
¦ 4MB
¦ 4MB
¦
Systems with a type 3 processor board support
Parity (70ns, 80ns, and 85ns) or ECC
If the display screen is blank, a POST error code
(This is not a standard configuration and should
¦ Copyright IBM Corp. 1990, 1992
2.4.4 - 2
(These are not standard
The defective
Some memory errors will
When a correctable memory
¦
¦
¦
¦
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