Lock Monitor - Siemens ERTEC 200P-2 Manual

Enhanced real-time ethernet controller
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Starts counting after XRESET is changing to high
Synchronized reset signal needed (has to operate as an asynchronous reset).
XLOCK-Output goes a logic one after approx. 1000µs after STBY was activated
and remains set until the next reset.
XRESET
STBY
XLOCK

2.3.9.3.3 Lock Monitor

Features:
Monitors the output of the oscillator cell and sets the LOSS signal if the oscillator
frequency is not working.
Monitors the output of the PLLs and sets the LOCK signals if the PLL frequencies
are within the defined limits.
All signals are synchronized twice with 125MHz clock signal
Each of the signals triggers its own interrupt (PLL-Lock, PLL-Loss, see chapter
2.3.2.14).
Limitations:
The free running frequency of the PLL is max. 300MHz (100MHz ... 300MHz) when
the input of PLLs is missing (open, clamped low, clamped high).
As long as the frequency ratio between the PLL input and the PLL output remains
unchanged, the Lock-Monitor does not detected a drift of the frequencies.
Function:
The LOSS signal:
The LOSS signal is generated with 500MHz. The signal is synchronized to
125MHz clock.
The generation of the LOSS signal is disabled as long as the Lock-Monitor is dis-
abled (i.e. XRESET = 0).
The LOSS signal is the output of a count down counter. If the counter reaches ze-
ro, then the LOSS signal is set.
Each rising edge of the oscillator output retriggers the count down counter.
The count down counter expires, if the oscillator is broken (open) or clampled
(tied to GND or VDD). The count down counter not expires, if the period of the
oscillator frequency rises above e.g. 2.5 times (< 10MHz) of the nominal oscillator
frequency (25MHz) because the frequency ratio (20) between rises oscillator fre-
quency (PLL input, e.g. 10MHz) and resulting PLL output (e.g. 200MHz) will be
reached within the distance of measure.
The counter operates with the output frequency of the 500 MHz PLL (i.e. in case
of an error the PLL will change its output frequency towards the free running fre-
quency of the PLL).
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
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ERTEC 200P-2 Manual
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