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Chapter 4:Connecting the Emulator to a Target System
Installing Emulator Features
Installing the foreground monitor
The foreground monitor supports interrupts and customization, but imposes on
your target system more than the background monitor. The foreground monitor
occupies a 4-Kbyte block in your target memory space. Emulation memory must
be mapped for this 4-Kbyte block. The target system cannot use this address range
for anything. The cycles strobes AS and DS are shown to the target system during
foreground monitor cycles. The monitor needs to be placed in an address range
where it will not interfere with target system operation.
If the monitor is placed in an address range where the target system responds with a
DSACK, interlock the monitor to the target strobes. The target system must not
respond with BERR for this address range. If the monitor is placed in an address
range where the target system does not respond with any strobes, do not interlock
the monitor. If in doubt, interlock the foreground monitor to the target system. It
will be obvious if this is the wrong thing to do because the monitor will stop
operating immediately.
If there is not a suitable address range in which to put the monitor, the system
protection schemes may need to be modified to create a place for the monitor. This
may be as simple as modifying the 68360 SIM programming, or it may require
modifying a hardware protection scheme to allow placement of the monitor.
The foreground monitor, in contrast to the background monitor, allows servicing of
interrupts. When the foreground monitor is not busy performing some action,
interrupts are allowed. The interrupt routine must return control to the monitor
within a reasonable period of time or the monitor may timeout if it attempts to do
something. The level of interrupt that can be recognized by the monitor can be
controlled through a configuration question:
cf monint=0
The foreground monitor is entered and exited through the background monitor,
therefore there is a short periods of time when interrupts are not serviced.
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