Table of Contents
Advertisement
Extending [%sp+imm6] displacement
The immediate (imm6) in displacement-added register indirect addressing instructions is extended. Be aware
that imm6 is handled differently in single instructions with no ext instructions added.
Displacement-added register indirect addressing instructions, when used singly, automatically calculate a
boundary address according to the data size to be transferred by the instruction.
Example: ld.h
%rd,[%sp+imm6]
The address referenced in this example is the "%sp+imm6∗2" address on a halfword boundary.
For addressing with ext instructions added, refer to the description below.
Extending to a 19-bit immediate
To extend the immediate to 19-bit quantity, enter one ext instruction directly before the target instruction.
The immediate that is extended to 19-bit quantity has its low-order bits fixed to "0" or "00" according to the
transferred data size. (This applies to other than byte transfers.)
Examples: ext
imm13
ld.b
%rd,[%sp+imm6]
ext
imm13
ld.h
[%sp+imm6],%rs
Extended immediate
Byte transfer
Halfword transfer
Word transfer
The extended data and the sp are added to comprise the source or destination address of transfer.
Extending to a 32-bit immediate
To extend the immediate to 32-bit quantity, enter two ext instructions directly before the target instruction.
The immediate that is extended to 32-bit quantity has its low-order bits fixed to "0" or "00" according to the
transferred data size. (This applies to other than byte transfers.)
Examples: ext
imm13 (1)
imm13 (2)
ext
ld.b
%rd,[%sp+imm6]
imm13 (1)
ext
imm13 (2)
ext
ld.h
[%sp+imm6],%rs
Extended immediate
Byte transfer
Halfword transfer
Word transfer
The extended data and the sp are added to comprise the source or destination address of transfer.
S1C33 FAMILY C33 PE CORE MANUAL
31
0
0
0
0
0
0
0
0 0 0 0 0 0
0
0
0
0
0
0
0
0 0 0 0 0
0
0
0
0
0
0
0
0 0 0 0 0 0
31
imm13 (1)
imm13 (1)
imm13 (1)
19 18
imm13
0
imm13
imm13
19 18
imm13 (2)
imm13 (2)
imm13 (2)
EPSON
5 INSTRUCTION SET
6
5
0
imm6
imm6 [5:1]
0
imm6 [5:2]
0 0
6
5
0
imm6
imm6 [5:1]
0
imm6 [5:2]
0 0
27
Advertisement
Table of Contents
