Yamaha RX-V381 Service Manual page 64

RX-V381/HTR-3069
Function Name
No.
76 EMB_D[14] / GP6[14]
77 CVDD
78 EMB_D[13] / GP6[13]
79 EMB_D[12] / GP6[12]
80 EMB_D[11] / GP6[11]
81 DVDD
82 EMB_D[10] / GP6[10]
83 EMB_D[9] / GP6[9]
84 EMB_D[8] / GP6[8]
85 EMB_WE_DQM[1] / GP5[14]
86 EMB_CLK
87 DVDD
88 EMB_SDCKE
89 EMB_A[12] / GP3[13]
89 EMB_A[12] / GP3[13]
90 DVDD
91 EMB_A[11] / GP7[13]
92 EMB_A[9] / GP7[11]
93 CVDD
94 EMB_A[8] / GP7[10]
95 EMB_A[7] / GP7[9]
96 EMB_A[6] / GP7[8]
97 EMB_A[5] / GP7[7]
98 EMB_A[4] / GP7[6]
99 DVDD
100 EMB_A[3] / GP7[5]
101 EMB_A[2] / GP7[4]
102 EMB_A[1] / GP7[3]
103 EMB_A[0] / GP7[2]
104 CVDD
105 EMB_A[10] / GP7[12]
106 EMB_BA[1] / GP7[0]
107 EMB_BA[0] / GP7[1]
108 EMB_CS[0]
109 DVDD
110 EMB_RAS
111 AXR0[0]/AFSR2/GP3[0]
112 AXR0[1]/ ACLKX2/GP3[1]
113 AXR0[2]/ AXR2[3]/GP3[2]
114 CVDD
115 AXR0[3]/ AXR2[2]/GP3[3]
116 AXR0[4]/ AXR2[1]/GP3[4]
117 AXR0[5]/ AFSX2/GP3[5]
118 AXR0[6]/ ACLKR2/GP3[6]
119 DVDD
120 AXR0[7]/GP3[7]
121 AXR0[8]/GP3[8]
122 UART1_RXD/AXR0[9]/GP3[9]
123 UART1_TXD/AXR0[10]/GP3[10]
124 AXR0[11]/ AXR2[0]/GP3[11]
125 AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11]
126 ACLKX0/ECAP0/APWM0/GP2[12]
127 AFSX0/GP2[13]/BOOT[10]
64
(P.C.B.)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O Detail of Function
EMIFB SDRAM data bus
EMIFB SDRAM data bus
EMIFB SDRAM data bus
EMIFB SDRAM data bus
EMIFB SDRAM data bus
EMIFB SDRAM data bus
EMIFB SDRAM data bus
EMIFB write enable/data mask for EMB_D
EMIF SDRAM clock
EMIFB SDRAM clock enable
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address bus
EMIFB SDRAM row/column address
EMIFB SDRAM row/column address
EMIFB SDRAM row/column address
EMIFB SDRAM row/column address
EMIFB SDRAM row/column address
EMIFB SDRAM row/column address bus
EMIFB SDRAM bank address
EMIFB SDRAM bank address
EMIFB SDRAM chip select 0
EMIFB SDRAM row address strobe
McASP0 serial data
McASP2 serial data
McASP0 serial data
McASP2 transmit bit clock
McASP0 serial data
McASP2 serial data
McASP0 serial data
McASP2 serial data
McASP0 serial data
McASP2 serial data
McASP0 serial data
McASP2 transmit frame sync
McASP0 serial data
McASP0 serial data
McASP0 serial data
UART1 receive data
McASP0 serial data
UART1 transmit data
McASP0 serial data
McASP0 serial data
McASP2 serial data
McASP0 transmit master clock
McASP2 transmit master clock
USB_REFCLKIN. Optional 48 MHz clock input
McASP0 transmit bit clock
Enhanced capture 0 input or auxiliary PWM 0 output
McASP0 transmit frame sync
BOOT[10]