Burst Priority Register (Bprio); Burst Priority Register (Bprio) Field Descriptions - Texas Instruments TMS320C6455 User Manual

Dsp ddr2 memory controller
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4.7

Burst Priority Register (BPRIO)

The Burst Priority Register (BPRIO) helps prevent command starvation within the DDR2 memory
controller. To avoid command starvation, the DDR2 memory controller momentarily raises the priority of
the oldest command in the command FIFO after a set number of transfers have been made. The
PRIO_RAISE bit sets the number of transfers that must be made before the DDR2 memory controller
raises the priority of the oldest command. The BPRIO is shown in
For more details on command starvation, see
31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-8
Reserved
7-0
PRIO_RAISE
SPRU970G – December 2005 – Revised June 2011
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Figure 25. Burst Priority Register (BPRIO)
R-0
Table 24. Burst Priority Register (BPRIO) Field Descriptions
Value
Description
000h
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
0h
1 memory transfer.
1h
2 memory transfers.
...
FEh
255 memory transfers.
FFh
EMIF reorders commands based on its arbitration.
Copyright © 2005–2011, Texas Instruments Incorporated
Figure 25
Section
2.7.2.
Reserved
R-0
8
7
C6455/C6454 DDR2 Memory Controller
DDR2 Memory Controller Registers
and described in
Table
PRIO_RAISE
R/W-0xFF
24.
16
0
47

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