100/1000 Tri-Speed Ethernet Phy - Xilinx ML505 User Manual

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21. 10/100/1000 Tri-Speed Ethernet PHY

Table 1-15: Board Connections for PHY Configuration Pins
Config Pin
CONFIG0
CONFIG1
CONFIG2
CONFIG3
CONFIG4
CONFIG5
CONFIG6
ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
Downloaded from Elcodis.com electronic components distributor
The board contains a Marvell Alaska PHY device (88E1111) operating at
10/100/1000 Mb/s. The board supports MII, GMII, RGMII, and SGMII interface modes
with the FPGA. The PHY is connected to a Halo HFJ11-1G01E RJ-45 connector with built-in
magnetics. The PHY is configured to default at power-on or reset to the settings shown in
Table 1-15. These settings can be overwritten via software. All modes are selectable by the
jumpers as shown in
Connection on
Board Definition and Value
V 2.5V PHYADR[2] = 1
CC
Ground ENA_PAUSE = 0
V 2.5V ANEG[3] = 1
CC
V 2.5V ANEG[0] = 1
CC
V 2.5V or
CC
LED_DUPLEX or HWCFG_MODE[2] = 0 or
LED_LINK1000 1 (Set by J23 and J24)
(Set by J23 and J24)
V 2.5V or DIS_FC = 1
CC
LED_LINK10
(Set by J22)
LED_RX SEL_BDT = 0
Table 1-15.
Bit[2]
Definition and Value
PHYADR[1] = 1
PHYADR[4] = 0
ANEG[2] = 1
ENA_XC = 1
HWCFG_MODE[1] = 1
DIS_SLEEP = 1
INT_POL = 1
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Detailed Description
Bit[1] Bit[0]
Definition and Value
PHYADR[0] = 1
PHYADR[3] = 0
ANEG[1] = 1
DIS_125 = 1
HWCFG_MODE[0] = 1
HWCFG_MODE[3] = 1
75/50Ω = 0
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