I/O Hub Chip - IBM Power Systems 775 Manual

1.4.2 I/O hub chip

This section provides information about the IBM Power 775 I/O hub chip (or torrent chip), as
shown in Figure 1-4.
LL0 Bus
8B
Copper 8B
LL1 Bus
8B
Copper
8B
LL2 Bus
8B
Copper
8B
LL3 Bus
8B
Copper 8B
LL4 Bus
8B
Copper
8B
LL5 Bus
8B
Copper
8B
LL6 Bus
8B
Copper 8B
Figure 1-4 Hub chip (Torrent)
Host fabric interface
The host fabric interface (HFI) provides a non-coherent interface between a quad-chip
module (QCM), which is composed of four POWER7, and the clustered network.
Figure 1-5 on page 11 shows two instances of HFI in a hub chip. The HFI chips also attach to
the Collective Acceleration Unit (CAU).
Each HFI has one PowerBus command and four PowerBus data interfaces, which feature the
following configuration:
1. The PowerBus directly connects to the processors and memory controllers of four
POWER7 chips via the WXYZ links.
10
IBM Power Systems 775 for AIX and Linux HPC Solution
Torrent
Diff PHYs
24
L remote
Buses
L remote
4 Drawer Interconnect to Create a Supernode
Optical
12x
12x
12x
12x
HUB to QCM Connections
Address/Data
I2C_0 + Int
I2C_27 + Int
D0 Bus
Optical
D15 Bus
Optical