Board Layout Considerations - Texas Instruments LMZ10500 Manual

650ma simple switcher nano module with 5.5v maximum input voltage
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Board Layout Considerations

SGND CONNECTION TO
QUIET PGND PLANE
The board layout of any DC-DC switching converter is critical for the optimal performance of the design. Bad
PCB layout design can disrupt the operation of an otherwise good schematic design. Even if the regulator still
converts the voltage properly, the board layout can mean the difference between passing or failing EMI
regulations. In a Buck converter, the most critical board layout path is between the input capacitor ground
terminal and the synchronous rectifier ground. The loop formed by the input capacitor and the power FETs is a
path for the high di/dt switching current during each switching period. This loop should always be kept as short
as possible when laying out a board for any Buck converter.
The LMZ10500 integrates the inductor and simplifies the DC-DC converter board layout. Refer to the example
layout in
Figure
39. There are a few basic requirements to achieve a good LMZ10500 layout.
1. Place the input capacitor C
(pin 6) on the LMZ10500 are next to each other which makes the input capacitor placement simple.
2. Place the V
filter capacitor C
CON
SGND terminals.The C
VC
Figure
39. This allows for better bypass of the control voltage set at V
3. Run the feedback trace (from V
4. Connect SGND to a quiet GND plane.
5. Provide enough PCB area for proper heatsinking. Refer to the
θ
values for different board areas. Also, refer to AN-2020 for additional thermal design hints.
JA
Refer to the evaluation board application note AN-2166 for a complete board layout example.
Copyright © 2011–2013, Texas Instruments Incorporated
RB
RESISTOR
RT
RESISTOR
VCON
SGND
VCON
CAPACITOR
Figure 39. Example Top Layer Board Layout
as close as possible to the V
IN
and the R
R
VC
B
capacitor (not R
) should be the component closer to the V
B
to FB) away from noise sources.
OUT
Product Folder Links:
SNVS723C – OCTOBER 2011 – REVISED MARCH 2013
HIGH di/dt LOOP
KEEP IT SMALL
EN
VREF
VIN
VIN
FB
PGND
PGND
VOUT
VOUT
OUTPUT
FEEDBACK
CAPACITOR
TRACE
and PGND terminals. V
IN
resistive divider as close as possible to the V
T
.
CON
Electrical Characteristics
LMZ10500
LMZ10500
INPUT
CAPACITOR
(pin 7) and PGND
IN
pin, as shown in
CON
table for example
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and
CON
19

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