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4 Board Layout
Figure 4-1
through
Figure 4-5
capacitors, and test points to configure the output voltage and precision enable pin, and set frequency and
external clock synchronization.
The RNP WQFN-30 package offers an exposed thermal pad which must be soldered to the copper landing on
the PCB for optimal thermal performance. The PCB consists of a 4-layer design. There are 2-oz copper planes
on the top and bottom and 1-oz copper mid-layer planes to dissipate heat with an array of thermal vias under the
thermal pad to connect to all four layers.
Test points have been provided for ease of use to connect the power supply and required load, and monitor
critical signals.
SNVU694A – FEBRUARY 2020 – REVISED JULY 2020
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show the board layout for the LM76005QEVM. The EVM offers resistors,
Figure 4-1. Top Silkscreen Layer
Copyright © 2020 Texas Instruments Incorporated
Board Layout
LM76005QEVM User's Guide
5
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