Texas Instruments TMS320 User Manual page 177

Note:
CLK functions should not call HWI_enter and HWI_exit as these are called
internally when DSP/BIOS runs CLK_F_isr. Additionally, CLK functions
should not use the interrupt keyword or the INTERRUPT pragma in C
functions.
The high-resolution clock ticks at the same rate the timer counter register is
incremented on the C6000 platform and decremented on the C28x platforms.
Hence, the high-resolution time is the number of times the timer counter
register has been incremented or decremented. On the C6000 platform, this
is equivalent to the number of instruction cycles divided by 4. The CPU clock
rate is high, therefore, the timer counter register can reach the period register
value (C6000 platform) or 0 (C28x platform) very quickly.
On the C6000 platform, the 32-bit high-resolution time is calculated by
multiplying the low-resolution time (that is, the interrupt count) by the value of
the period register and adding the current value of the timer counter register.
To obtain the value of the high-resolution time you can call CLK_gethtime
from your application code. The value of both clock restart at 0 when the
maximum 32-bit value is reached.
On the C28x platform, the 32-bit high resolution time is calculated by
multiplying the low-resolution time (that is, interrupt count) by the value of the
period register, and adding the difference between the period register value
and the value of the timer counter register. To obtain the value of the high-
resolution time, you can call CLK_gethtime from your application code, the
value of the clock restart at the value in the period register when 0 is reached.
Other CLK module APIs are CLK_getprd, which returns the value set for the
period register in the configuration; and CLK_countspms, which returns the
number of timer counter register increments or decrements per millisecond.
Modify the properties of the CLK Manager to configure the low-resolution
clock. For example, to make the low-resolution clock tick every millisecond
(.001 sec), type 1000 in the CLK Manager's Microseconds/Int field. The
configuration automatically calculates the correct value for the period register.
You can directly specify the period register value if you set the Directly
configure on-device timer registers property to true. On the C6000 platform,
to generate a 1 millisecond (.001 sec) system clock period on a 160 MIPS
processor using the CPU clock/4 to drive the clock, the period register value
is:
Period = 0.001 sec * 160,000,000 cycles per second / 4 cycles = 40,000
Timers, Interrupts, and the System Clock
Thread Scheduling 4-73