Texas Instruments TMS320 User Manual page 159

4.6.5.1 Effects on the DSP/BIOS CLK Module
Applications also can learn about the V/F scaling features supported by a
platform using the PWRM_getCurrentSetpoint, PWRM_getNumSetpoints,
PWRM_getSetpointInfo, and PWRM_getTransitionLatency functions.
The PWRM module also supports coordination of V/F changes across the
application, through a registration and notification mechanism. As clients
register with PWRM to be notified of V/F scaling power events, they indicate
the V/F setpoints they support. So, for example, if a driver cannot operate
below a particular frequency, the client indicates this when it registers with the
PWRM module, which prohibits transitions to lower frequencies as long as
the client remains registered.
The PWRM module makes V/F scaling changes using a platform-specific
Power Scaling Library (PSL). This library is implemented only for certain
platforms. For information about the Power Scaling Library, see Using the
Power Scaling Library on the TMS320C5510 (SPRA848).
On the 'C5509A, the clock affected by V/F scaling (CPU) is the same clock
that drives the timer used by DSP/BIOS for clock services (the CLK module).
This means changing the V/F setpoint disrupts DSP/BIOS clock services. To
minimize disruption, the PWRM module allows the DSP/BIOS CLK module to
register for notification of V/F scaling events. When notified of a new V/F
setpoint, the CLK module reprograms the timer to tick at the same rate used
prior to the scaling operation.
As a result, low-resolution time (CLK_getltime) continues to function following
frequency scaling. However, a small amount of absolute time may be lost due
to the reprogramming operation. The loss occurs because the DSP/BIOS
timer halts temporarily as the last step before V/F scaling occurs. As soon as
possible after a scaling operation, the timer begins ticking at the same rate
used before the scaling operation. During the scaling operation, time
essentially "stands still" for DSP/BIOS and the application. No effort is made
to catch up for time lost while the clock was stopped or while the timer was
reprogrammed to tick at the same rate using the new CPU frequency. Also,
absolute accuracy varies depending upon how well the new input frequency
can be divided down to generate the selected tick rate.
High-resolution time (CLK_gethtime) can be used in combination with V/F
scaling with the following caveats:
❏ Across setpoint transitions, comparing CLK_gethtime deltas produces an
erroneous value. Between setpoint transitions, CLK_gethtime can still be
used to get high-resolution deltas.
❏ The rate at which the timer increments or decrements is usually different
at different V/F setpoints.
Power Management
Thread Scheduling 4-55