Siemens Simatic S7-1500 CPU 1512C-1 PN User Manual page 105

Digital inputs HSC DI0 and HSC DI1
The digital inputs are logically assigned to the high-speed counters (HSC). For information
on the possible assignment of the on-board I/O inputs to the high-speed counters, refer to
table Interconnection overview of the inputs (Page 109). Up to two digital inputs are available
for each high-speed counter (HSC DI0 and HSC DI1). You can use the digital inputs for the
gate control (Gate), synchronization (Sync) and Capture functions. Alternatively, you can use
one or more digital inputs as standard digital inputs without the functions mentioned and
read the signal state of the respective digital input using the feedback interface.
Digital inputs that you do not use for high-speed counting are available for use as standard
DIs.
Input addresses of the high-speed counters
You set the digital input addresses used by the high-speed counters (HSC) and the
assignment of A/B/N, DI0, DI1 and DQ1 signals in STEP 7 (TIA Portal). You can enable and
configure each HSC when you configure the compact CPU.
The compact CPU assigns the input addresses for the A/B/N signals automatically according
to the configuration.
You specify the input addresses for DI0 and DI1 according to the table Interconnection
overview of the inputs (Page 109). The interconnection produces a direct connection of the
HSC to an input of the on-board I/O. The high-speed counter then uses this input as
HSC DI0 or HSC DI1 ([DI] symbol). The [DI] symbols in the table identify the input addresses
for HSC DI0 and HSC DI1 that are offered for selection in the hardware configuration.
Assignment of HSC addresses of inputs
You can find an overview of the options for interconnecting the inputs of the front connectors
X11 and X12 in the section Interconnection overview of the inputs (Page 109).
Note
HSC compatibility mode
The displayed interconnection options in the section Interconnection overview of the inputs
(Page 109) assume that the "Front connector assignment like CPU 1511C" option is
disabled. If the option is enabled, the input signals are interconnected the same way as for
the CPU 1511C-1 PN. In this case, the interconnection options of the CPU 1511C-1 PN
manual apply.
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)
Manual, 12/2017, A5E40898741-AA
4.3 Terminal and block diagrams
Wiring
105