JBL ES250PW Service Manual page 35

ES250PW
Philips Semiconductors
8-bit parallel-in/serial-out shift register
FUNCTION TABLE
OPERATING MODES
parallel load
serial shift
hold "do nothing"
Note
1. H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition
q = lower case letters indicate the state of the referenced output one set-up time prior to the
LOW-to-HIGH clock transition
X = don't care
↑ = LOW-to-HIGH clock transition
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Fig.4 Functional diagram.
INPUTS
PL CE CP
L X X
L X X
↑
H L
↑
H L
H H X
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D D -D
S 0 7
X L L
X H H
l X L
h X H
X X q
0
Fig.5 Logic diagram.
34
Product specification
74HC/HCT165
Q REGISTERS OUTPUTS
n
Q Q -Q Q
0 1 6 7
L - L L
H - H H
q -q q
0 5 6
q -q q
0 5 6
q -q q
1 6 7
Q
7
H
L
q
6
q
6
q
7