JBL ES250PW Service Manual page 34

ES250PW
Philips Semiconductors
8-bit parallel-in/serial-out shift register
PIN DESCRIPTION
PIN NO.
1
7
9
2
8
10
11, 12, 13, 14, 3, 4, 5, 6
15
16
Fig.1 Pin configuration.
Downloaded from www.Manualslib.com
SYMBOL
PL
Q
7
Q
7
CP
GND
D
s
D to D
0 7
CE
V
CC
manuals search engine
NAME AND FUNCTION
asynchronous parallel load input (active LOW)
complementary output from the last stage
serial output from the last stage
clock input (LOW-to-HIGH edge-triggered)
ground (0 V)
serial data input
parallel data inputs
clock enable input (active LOW)
positive supply voltage
Fig.2 Logic symbol.
33
Product specification
74HC/HCT165
Fig.3 IEC logic symbol.