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Frame
1
Ia
1 Ia
header
10 bits
8
1 4
(1)
Legend
Ia, Ib, Ic :
Phase current
V1 :
Positive-sequence voltage
Io :
Zero-sequence current
ON / OFF :
Control data
RDY :
Ready
SA :
Sampling address
SP :
Sampling synchronization
CRC :
Cyclic redundancy check
S.F.C.
Simultaneous fault control
(synchronized test trigger signal)
User configurable commands are the followings:
COM1- to COM5-: These commands are sent every frame and used for high-speed signals such as
SUB_COM1 to SUB_COM5: These commands are sent every 12 frames. SUB_COM1,
88 bits
Ib 1
Ib
1
Ic
4 1
8
1
8
(2)
COM1
DIF-A
Frame
No.
0
SUB2 COM1
1
SUB2 COM2
2
SUB2 COM3
3
SUB2 COM4
4
SUB2 COM5
5
SUB2 COM5
6
SUB2 COM7
7
SUB2 COM8
8
SUB2 COM9
9
SUB2 COM10
10
SUB2 COM11
11
SUB2 COM12
Figure N-1 Data Transmission Format of A-MODE
a transfer trip and block signals.
SUB_COM2,
ARC_BLOCK, Local test, DIFG, and TFC signals as default setting. If
these signals are changed, the related functions cannot be applied.
1 Ic
V1 1 Io
COM
C
1
O
2
M
3
4
1 4
4 1 4
3 1 1 1 1 1 1 1 1 2 1
COM2
COM3
COM4
DIF-B
DIF-C
85S1
SUB2_COM
CBDS-A
-B
-C
CBDS-A
-B
-C
SUB COM1
CBDS-A
SUB COM2
-B
SUB COM3
-C
CBDS-A
SUB COM5
-B
SUB COM4
-C
(3)
(*) Time data are transmitted once per two cycles.
SUB_COM3
and
420
6 F 2 S 0 8 5 0
1
C
R
R
S
S
R
C
1
CRC
O
A
D
P
A
A
R
M
1
Y
2
C
5
8
Fixed
SUB2
R
COM5
bit
COM
D
Y
85S2
SA
SP1
SUB_COM
0
2
0
2
0
2
0
2
1
SP flag
ARC BLOCK
2
Local Test
2
DIFG
2
1
2
SPARE
-
TFC
-
S.F.C.
-
SUB_COM4
are
assigned
Next
Frame
1 CRC
1
6
(5)
S
S
S
A
P
P
1
2
SP2
0
8
2
1
9
2
2
10
2
3
11
2
-
4
12
2
5
13
2
6
14
2
7
15
2
-
Time
-
data(*)
-
(4)
to
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- Current Differential Protection
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