And U.2 Slot Breakdown (Skylake-X) - EVGA X299 DARK Owner's Manual

EVGA X299 DARK (151-SX-E299)
M.2 and U.2 Slot Breakdown (Skylake-X)
PCIe Lane Distribution (Core
Processors)
U.2(PU1) x4 PCIe Gen 3 lanes from CPU

o Must be enabled in BIOS, which disables M.2 110mm
U.2(PU2) x4 PCIe Gen 3 lanes from CPU

M.2 Key-M (110mm) PM1 – x4 PCIe Gen 3 lanes from CPU

o Supports PCIe/NVMe only
o Must be enabled in BIOS, which disables U.2(PU1)
M.2 Key-M (80mm) PM2 – x4 PCIe Gen 3 lanes CPU or PCH based on

configuration.
o Supports Optane
o If PE6 is populated by a video card (anything using x8 lanes) this
receives x4 lanes from PCH, otherwise x4 lanes from the CPU are used
when PE6 is empty.
M.2 Key-E (32mm) PE – x1 PCH lane

PCIe Lane Distribution (Core
Processors)
U.2(PU1) x4 PCIe Gen 3 lanes

o Must be enabled in BIOS, which disables M.2 110mm
U.2(PU2) (44 Lane CPU ONLY)

M.2 Key-M (110mm) PM1 – x4 PCIe Gen 3 lanes from CPU

o Supports PCIe/NVMe only
o Must be enabled in BIOS, which disables U.2(PU1)
M.2 Key-M (80mm) PM2 – x4 PCIe Gen 3 lanes from PCH

o Supports Optane
o Must be enabled in BIOS, which disables PE6
M.2 Key-E (32mm) – x1 PCH lane

™
/PCIe/NVMe
™
™
/PCIe/NVMe
™
i9-79xx, 44 Lane
i7-78xx, 28 Lane
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