Figure 12. Output Voltage Timing; Table 39. Turn On/Off Timing - Intel S5000VCL Technical Product Specification

Power and Environmental Specifications
V out
10% V out
V1
V2
V3
V4
Item
T Delay from AC being applied to 5VSB being within regulation.
sb_on_delay
T Delay from AC being applied to all output voltages being
ac_on_delay
within regulation.
T Time all output voltages stay within regulation after loss of
vout_holdup
AC. Measured at 75% of maximum load.
T Delay from loss of AC to de-assertion of PWOK. Measured at
pwok_holdup
75% of maximum load.
T Delay from PSOn
pson_on_delay
limits.
T Delay from PSOn
pson_pwok
T Delay from output voltages within regulation limits to PWOK
pwok_on
asserted at turn on.
T Delay from PWOK de-asserted to output voltages (3.3V, 5V,
pwok_off
12V, -12V) dropping out of regulation limits.
T Duration of PWOK being in the de-asserted state during an
pwok_low
off/on cycle using AC or the PSOn signal.
T Delay from 5VSB being in regulation to O/Ps being in
sb_vout
regulation at AC turn on.
T Time the 5VSB output voltage stays within regulation after
5VSB_holdup
loss of AC.
42
T vout_rise
T vout_on

Figure 12. Output Voltage Timing

Table 39. Turn On/Off Timing

Description
#
active to output voltages within regulation
#
deactive to PWOK being de-asserted.
Intel order number: D64569-007
Intel Server Board S5000VCL TPS
®
T vout_off
AF001023
Minimum Maximum
1500
2500
21
20
5 400
50
100 500
1
100
50 1000
70
Units
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
Revision 2.3