Functional Architecture - Intel S5000VCL Technical Product Specification

Functional Architecture

Intel Server Board S5000VCL TPS
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3. Functional Architecture
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The architecture and design of the Intel Server Board S5000VCL is based on the Intel 5000V
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Chipset. The chipset is for systems based on the Dual-Core Intel Xeon processor 5100 series
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and low-voltage Quad-Core Intel Xeon processor 5300 series with system bus speeds of
1067 MHz and 1333 MHz.
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The chipset has two main components: the Intel 5000V Memory Controller Hub (MCH) for the
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host bridge and the Intel 6321ESB I/O Controller Hub for the I/O subsystem.
This chapter provides a high-level description of the functionality associated with each chipset
component and the architectural blocks that make up this server board. For in depth information
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on each of the chipset components and each of the functional architecture blocks, see the Intel
5000 Series Chipsets Server Board Family Datasheet.
6 Revision 2.3
Intel order number: D64569-007