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80960SA
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Figure 21 Interrupt Acknowledge Cycle - Intel 80960SA Manual
Embedded 32-bit microprocessor with 16-bit burst data bus
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80960SA
T
a
CLK2
CLK
ALE
AS
A31:16
A15:4,
ADD
D15:0
A3:1
BE1:0
INTA
BLAST
W/R
DT/R
DEN
LOCK
READY
32
T
T
T
T
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r
i
i
1 0
Figure 21. Interrupt Acknowledge Cycle
T
T
T
T
i
i
i
a
ADDR
1 1 0
T
T
T
w
d
r
DATA
1 0
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