Pin Layout - Integra DTR-4.9 Service Manual

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-2
Q201 : D788E001BRFP266 (Floating-Point Digital Signal Processor)-2/5

PIN LAYOUT

VSS 109
SPI0_SIMO 110
SPI0_SOMI/I2C0_SDA 111
DVDD 112
AXR0[0] 113
VSS 114
AXR0[1] 115
AXR0[2] 116
AXR0[3] 117
VSS 118
AXR0[4] 119
AXR0[5]/SPI1_SCS 120
AXR0[6]/SPI1_ENA 121
AXR0[7]/SPI1_CLK 122
CVDD 123
VSS 124
DVDD 125
AXR0[8]/AXR1[5]/SPI1_SOMI 126
AXR0[9]/AXR1[4]/SPI1_SIMO 127
CVDD 128
VSS 129
AXR0[10]/AXR1[3] 130
AXR0[11]/AXR1[2] 131
CVDD 132
VSS 133
AXR0[12]/AXR1[1] 134
135
AXR0[13]/AXR1[0]
DVDD 136
AXR0[14]/AXR2[1] 137
AXR0[15]/AXR2[0] 138
ACLKR0 139
VSS 140
AFSR0 141
ACLKX0 142
AHCLKR0/AHCLKR1 143
AFSX0 144
144-pin RFP
DTR-4.9
72 VSS
71 EM_CKE
70 EM_CLK
69 VSS
68 DVDD
67 EM_WE_DQM[1]
66 EM_D[8]
65 CVDD
64 EM_D[9]
63 EM_D[10]
62 VSS
61 EM_D[11]
60 DVDD
59 EM_D[12]
58 EM_D[13]
57 CVDD
56 EM_D[14]
55 EM_D[15]
54 VSS
53 CVDD
52 EM_D[0]
51 EM_D[1]
50 DVDD
49 EM_D[2]
48 EM_D[3]
47 VSS
46 EM_D[4]
45 EM_D[5]
44 CVDD
43 EM_D[6]
42 DVDD
41 EM_D[7]
40 VSS
39 EM_WE_DQM[0]
38 EM_WE
37 EM_CAS