Integra DTR-4.9 Service Manual page 61

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-26
Q8051 : SiI9013 ( HDMI Receiver)-1/4
BLOCK DIAGRAM
DSDA
DSCL
RXC
Panel Link
RX0
TMDS
Digital
RX1
Core
RX2
HS, VS, DE
CKDT
PWR5V
2
I C
Slave
HDCP
Keys
HDCP
Descryption
Engine
XOR
Mask
Decrypted
Pixel Data
Port
Detect
Registers
Configuration
Logic Block
Aux
Data
HDMI
Mode
Control
24-BIt
Video Color
Converter /
4:2:2/4:4:4
DTR-4.9
RESET#
INT
2 CSDA
I C
CSCL
Slave
CI2CA
MCLK
MCLK
Gen
XTALIN
XTALOUT
SPDIF
WS
SCK
Audio
Data
SD0
Decode
SD1
SD2
SD3
Auto A/V
MUTE
Exception Handling
SCDT
DE
HSYNC
Space
VSYNC
ODCK
Decimator
48
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