Pin Layout - Integra DSR-4.8 Service Manual

QQ
3 7 63 1515 0
IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION-8
Q1103 : VOLTAGE DETECTOR (S-80127CNMC-JKM-T2)
1. BLOCK DIAGRAM
1. Within Diode

2. PIN LAYOUT

TE
L 13942296513
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.
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VDD
1
V
REF
VSS
SOT-23-5
5
4
1 2 3
Top view
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y
i
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8
Delayting circuit
OSC
OUT
Counter
Timer
1
1
DS
DESCRIPTION
PIN NO. PIN NAME
Q Q
3 6 7 1 3
1 DS Select Delay time ON/ODD
2 VSS GND pin
3 NC NC
4 OUT Detect output pin
5 VDD Input voltage pin
u163
.
2 9 9 4 2 8
DESCRIPTION
1 5 0 5 8 2 9 9 4
m
co
DSR-4.8
9 9
2 8 9 9