Integra DTR-4.9 Service Manual page 60

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-25
Q8401 : SiI9034CTU (HDMI Transmitter)-4/4
TERMINAL DESCRIPTION
Configuration / Programming Pins
Pin Name Pin #
HPD 51
RSVDL 52
INT 24
Control Pins
Pin Name Pin #
CI2CA 50
RESET# 25
CSCL 48
CSDA 49
DSCL 46
DSDA 47
Diffrential Signal Data Pins
Pin Name Pin #
TX0+ 34
TX0- 33
TX1+ 37
TX1- 36
TX2+ 40
TX2- 39
TXC+ 31
TXC- 30
EXT_SWING 27
Power and Ground Pins
Pin Name Pin #
CVCC18 12, 64, 76, 99
IOVCC33 14, 53, 66, 89
RSVD18 55
AVCC33 44
AVCC18 32, 38
AGND 26, 29, 35, 41, 43
PVCC1 28
PVCC2 42
DDCPWR5V 45
GND 13, 54, 65, 67 - 70,
80 - 83, 87, 95 - 98,
100
Dir Description
Input Hot Plug Detect Input.
Input Reserved for use by Silicon Image and must be tied LOW.
Output Interrupt Output.
Dir Description
2
Input I C device address select
Input Reset Pin (Active LOW) 5V Tolerant
2
Input I C Clock
2
Bi-Di I C Data (Open Drain Output)
Bi-Di DDC Clock (Open Drain Output)
Bi-Di DDC Data (Open Drain Output)
Dir Description
Output TMDS output data pairs.
Output
Output
Output
Output
Output
Output TMDS output clock pair.
Output
Input Voltage Swing Adjust. A resistor is tied from this pin to AVCC18.
This resistor determines the amplitude of the voltage swing.
Type Description
Digital Core VCC. Connect to 1.8v supply.
Power
Power IO Pin VCC. Connect to 3.3V supply.
Power Reserved. Must be connected to 1.8V for all operations.
Power Analog VCC. Connect to 3.3V supply.
Power Analog VCC. Connect to 1.8V supply.
Ground Analog GND.
Power TMDS Core PLL power. Connect to 1.8V supply.
Power Filter PLL Power. Connect to 1.8V supply.
Power Power reference signal. Used to supply power to the DDC I2C pads
when chip is powerd off. Connect to 5V supply.
Groud Digital Ground.
DTR-4.9