Integra DTR-4.9 Service Manual page 40

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-5
Q201 : D788E001BRFP266 (Floating-Point Digital Signal Processor)-5/5
TERMINAL DESCRIPTION
Clocks
Pin Name
OSCIN
OSCOUT
OSCVDD
OSCVSS
CLKIN
PLLHV
Device Reset
Pin Name
RESET
Emulation/JTAG Port
Pin Name
TCK
TMS
TDI
TDO
TRST
EMU[0]
EMU[1]
Power Pins
Pin Name
Core Supply (CVDD)
IO Supply (DVDD)
Ground (VSS)
Pin No. Type Description
23 I 1.2-V Oscillator Input
24 O 1.2-V Oscillator Output
25 --- Oscillator 1.2-V VDD tap point (for filter only)
22 --- Oscillator VSS tap point (for filter only)
17 I Alternate clock input (3.3-V LVCMOS Input)
27 --- PLL 3.3-V Supply Input (requires external filter)
Pin No. Type Description
14 I Device reset pin
Pin No. Type Description
35 I Test Clock
19 I Test Mode Select
28 I Test Data In
29 O Test Data Out
21 I Test Reset
32 IO Emulation Pin 0
34 IO Emulation Pin 1
Pin No.
8, 16, 20, 33, 44, 53, 57, 65, 77, 85, 90, 101, 123, 128, 132
10, 31, 42, 50, 60, 68, 73, 81, 92, 103, 112, 125, 136
1, 6, 13, 15, 18, 26, 30, 36, 40, 47, 54, 62, 69, 72, 78, 82, 87, 95, 99, 106, 109, 114, 118, 124,
129, 133, 140
DTR-4.9