Integra DTR-4.9 Service Manual page 57

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-22
Q8401 : SiI9034CTU (HDMI Transmitter)-1/4
BLOCK DIAGRAM
2
CSDA
I C
Slave
CSCL
CI2CA
RESET#
Video Data
IDCK
Capture /
D[23:0]
DE Gen /
HSYNC
656
VSYNC
Logic
DE
Block
DCLK
SPDIF
MCLK
Audio Data
SCK
Capture /
WS
Logic
SD[3:0]
Block
DL[3:0]
DR[3:0]
Registers
Configuration
Logic Block
Video
Packetizer
Processing
control signals
audio data
E-DDC
Master
Receiver Sense + Interrupt Logic
HDCP
Keys
ROM
encrypted
data
VastLane
XOR
TMDS
Digital
Core
DTR-4.9
5V
DSDA
DSCL
INT
HPD
EXT_SWING
TXC
TX0
TX1
TX2