Integra DTR-7.7 Service Manual page 85

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -17
Q361: CS42528 (8-Ch CODEC with S/PDIF Receiver)
TERMINAL DESCRIPTION (1/2)
Pin Name #
CX_SDIN1 1
CX_SDIN2 64
CX_SDIN3 63
CX_SDIN4 62
CX_SCLK 2
CX_LRCK 3
VD 4
51
DGND 5
52
VLC 6
SCL/CCLK 7
SDA/CDOUT 8
AD1/CDIN
9
TE
L 13942296513
AD0/CS 10
INT 11
RST 12
AINR- 13
AINR+ 14
AINL- 15
AINL+ 16
VQ 17
FILT+ 18
REFGND 19
AOUTA1 +, - 36, 37
35, 34
AOUTB1 +, -
AOUTA2 +, - 32, 33
AOUTB2 +, - 31, 30
AOUTA3 +, - 28, 29
AOUTB3 +, - 27, 26
AOUTA4 +, - 22, 23
AOUTB4 +, - 21, 20
VA
24
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VARX
41
AGND
25
40
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Pin Description
Codec Serial Audio Data Input (Input) - Input for two's complement serial audio data.
CODEC Serial Clock (Input/Output) - Serial clock for the CODEC serial audio interface
CODEC Left Right Clock (Input/ Output) - Determines which channel, Left or Right, is currently active on
the CODEC serial audio data line.
Digital Power (Input) - Positive power supply for the digital section.
Digital Ground (Input) - Ground reference. Connects to digital ground.
Control Port Power (Input) - Determines the required signal level for the control port.
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Serial Control Data (Input/Output) - SDA is a data I/O line in IC mode and requires an external pull-up
resistor to the logic interface voltage. CDOUT is the output
data line for the control port interface in SPI mode.
2
Address Bit 1 (I C)/Serial Control Data (SPI) (Input) - AD1 a chip address pin in I C mode; CDIN is
the input data line for control port interface in SPI mode.
2
Address Bit 0 (I C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I C mode; CS
is the chip select signal in SPI mode.
Interrupt (Output) - The CS42528 will generate an interrupt condition as per the Interrupt Mask register.
Reset (Input) - The device enters a low power mode and all internal registers are reset to their default
settings when low.
Differential right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
modulators via the AINR+/- pins.
Differential right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
modulators via the AINR+/- pins.
Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
Reference Ground (Input) - Ground reference for the internal sampling circuits.
Differential Analog Output (Output) - The full-scale differential analog output level is specified in the
Analog Characteristics specification table.
Analog Power (Input) - Positive power supply for the analog section.
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Analog Ground (Input) - Ground reference. Connectes to analog ground.
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