Samsung WA31273A Technical Manual page 69

Winner 3a; winner 2a series ide drives
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be less than the minimum cycle time reported by the fastest DMA mode supported by
the device.
6-4-4-23
Word 66: Manufacture' s Recommended Multi-word DMA Cycle Time
Word 66 of the parameter information of the IDENTIFY DEVICE Command is defined
as the Manufacture's Recommended Multi-word DMA Transfer Cycle Time. This field
defines, in nanoseconds, the minimum cycle time per word during a single sector host
transfer while performing a multiple sector READ DMA or WRITE DMA commands
over all locations on the media under nominal conditions.
If a host runs at a faster cycle rate by operating at a cycle time of less than this value, the
device may negate DMARQ for flow control. The rate at which DMARQ is negated
could result in reduced throughput despite the faster cycle rate. Transfer at this rate
does ensure that flow control will not be used, but implies that higher performance
MAY result.
If this field is supported, bit 1 of word 53 shall be set. Any device which supports Multi-
word DMA Mode 1 or above shall support this field, and the value in word 66 shall not
be less than the value in word 65.
6-4-4-24
Word 67 : Minimum PIO Transfer Cycle Time Without Flow Control
Word 67 of the parameter information of the IDENTIFY DEVICE Command is defined
as the Minimum PIO Transfer without Flow Control Cycle Time. This field defines, in
nanoseconds, the minimum cycle time that, if used by the host, the device guarantees
data integrity during the transfer without utilization of flow control.
Any device may support this field, and if this field is supported, Bit 1 of word 53 shall be
set.
Any device which supports PIO Mode 3 or above shall support this field, and the value
in word 67 shall not be less than the value reported in word 68.
6-4-4-25 Word 68 : Minimum PIO Transfer Cycle Time With IORDY
Word 68 of the parameter information of the IDENTIFY DEVICE command is defined
as the Minimum PIO Transfer with IORDY Flow Control Cycle Time. This field defines,
in nanoseconds, the minimum cycle time that the device can support while performing
data transfers while utilizing IORDY flow control.
Any device may support this field, and if this is supported, Bit 1 of word 53 shall be set.
Any device which supports PIO Mode 3 or above must this field, and the value in word
68 shall not be less than the fastest PIO mode reported bythe device.
WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-25
AT INTERFACE and ATA COMMANDS

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