Samsung WA31273A Technical Manual page 34

Winner 3a; winner 2a series ide drives
Table of Contents

Advertisement

Disk Drive Operation
Support for PIO modes 0 through 4.
Support for synchronous DMA transfers.
5-2-1-2
The Buffer Management Block
The Buffer Management block manages the flow of data into and out of the buffer. Significant
automation is incorporated which allows buffer activity to take place automatically during read/write
operations between the host and the disk. This automation works together with automation within the
Host Control and Disk Control blocks to provide more bandwidth for the imbedded DSP
microprocessor to perform non-data flow functions. The buffer control circuitry keeps track of buffer
full and empty conditions and automatically works with the Disk Control block to stop transfers to or
from the disk when necessary. In addition, transfers to or from the host are automatically stopped or
started based on buffer full or empty status.
A prioritized five channel port buffer control architecture is implemented (Host, Disk, MPU, ECC and
Refresh).
The data path to the buffer RAM is 16-bit path in ATA mode. A parity bit is available for each of the
low and high order eight bits.
EDO DRAM support is provided with up to 4 MB addressing capability (Page 8 mode) with up to 50
MB buffer bandwidth.
The buffer Control block incorporates very flexible segmentation support. Two operational segments
can be set up to support general read/write, auto write, and read caching (Auto-Read) algorithms. The
segment size is programmable to any value up to 4 Mbytes with 2 byte resolution. In addition, there is
special segment support for storing disk servo split pointers. The various pointers are designed to
automatically wrap at segment boundaries to ensure data integrity without microprocessor intervention.
Additional functionality is provided in the Buffer Management block through the following features:
Increased automation to support minimal latency read operations with minimal latency and true
buffer alignment.
16 bits Memory Data Bus.
Capability to support the execution of multiple consecutive Auto-Write commands without loss of
data due to overwriting of data.
EDO-DRAM support with up to 4 MB addressing capability (Page 8 mode).
Buffer bandwidth: 50 MB/sec.
Minimum Latency Read support.
Auto Data Streaming for Host and Disk.
Servo Pointer wrap capability.
5-
8 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /

Advertisement

Table of Contents
loading

This manual is also suitable for:

Wa32543aWa33203aWa32163aWa31083aWa32162a

Table of Contents