Samsung WA31273A Technical Manual page 36

Winner 3a; winner 2a series ide drives
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Disk Drive Operation
Automatic timeout on the Sync Field..
A 34-byte FIFO between the buffer and the Disk Control block smoothes out data flow attributed
to discontinuities in data or differences in speed.
Defect Management with skip flag..
PRML read channel support.
Automatic internal Sector Mark generation (no external Sector Mark needed).
Automatic Sector/Servo Mark alignment.
5-2-1-4 The Disk ECC Block
The SID-9501D provides 3-way interleaved 144 bit Reed-Solomon ECC On The Fly correction. The
code is capable of correcting up to three bursts per interleave in hardware. The Disk ECC block also
supports 4 bytes bits of CRC data to the ECC generator to allow for greater data integrity in a
headerless environment
Error detection and correction is handled in the Disk Control block. Automatic on-the-fly hardware
correction will take place for up to three symbols in error per interleave. Correction is guaranteed to
complete before the ECC Field of the sector following the sector where the error occurred utilizing
standard ATA size sectors. Optional burst limiting can be used to decrease the probability on
misdetection and miscorrection.
5-2-1-5 Data Acquisition / VCM / Embedded Servo Control
The SID-9501D provides control for Data Acquisition, VCM control and support of Embedded Servo.
Features include:
10-bit resolution, 3-step Flash AD converter.
5 Channels of Analog Data Input
1.2µs conversion time per channel
Pipelined Conversion Mode
12-bit resolution DAC
Programmable Servo Address Mark control
Di-pulse Gray Code decoder
Programmable read channel interface
5-
10 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /

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