Samsung WA31273A Technical Manual page 33

Winner 3a; winner 2a series ide drives
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Programmable IRQ timer to allow automation to work with different BIOS implementations and
different device drivers.
IORDY for PIO flow control.
40-byte host FIFO to allow automation to occur smoothly during discontinuities in transfers on the
ATA interface.
Auto Command support.
Automation of an extensive portion of the ATA command set.
LBA or CHS Task File Modes.
Provides logic for daisy chaingin two embedded disk controllers.
On-chip 12mA Host Drivers.
The SID-9501D also supports a basic ATAPI environment. this consists of:
ATAPI Reset command.
ATAPI Packet command.
ATAPI Identify Device commands.
ATAPI Service command.
The SID-9501D supports both PIO and DMA type transfers. The supported DMA type transfers includes
single-word, multi-word, and synchronous DMA transfers. DMA transfers and PIO transfers utilize the bus in
8- or 16-bit mode depending upon the command being executed. The bus is automatically switched between
16- and 8-bit mode while performing Read Long and Write Long commands at the time of ECC byte transfers.
Additional functionality is provided in the Host Interface block by the following features:
Programmable transfer length for automatic ECC byte transfer on the AT bus.
Automatically inserted wait states are provided to support the IOCHRDY signal pin functions at
any ATA interface speed.
Support for Master/Slave configuration of two embedded disk controller drives.
Automatic detection of Host status reads.
Support of both LBA and CHS Task File register formats.
Automatic detection of both the software AT reset and hardware AT reset.
12-mA drivers are provided for direct connection to the ISA/EISA bus. Some ATA inputs are
Schmitt trigger inputs.
WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A5-7
Disk Drive Operation

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