Samsung SP0401N Product Manual
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Samsung SP0401N Product Manual

Spinpoint p80 series
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See also: Service Manual , User Manual
P80 Series
Product Manual
SAMSUNG 3.5" Hard Disk Drives
April 21, 2003 (Rev 01)

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Summary of Contents for Samsung SP0401N

  • Page 1 P80 Series Product Manual SAMSUNG 3.5” Hard Disk Drives April 21, 2003 (Rev 01)

  • Page 3: Table Of Contents

    TABLE OF CONTENTS CHAPTER 1 SCOPE ..........................1 ..........................1 EFINITION ......................... 2 ANUAL RGANIZATION ....................2 ERMINOLOGY AND ONVENTIONS ............................3 EFERENCE CHAPTER 2 DESCRIPTION........................4 ..........................4 NTRODUCTION ..........................4 EATURES ....................... 5 TANDARDS AND EGULATIONS ......................5 ARDWARE EQUIREMENTS CHAPTER 3...
  • Page 4 5.2.3 Read/Write IC .......................... 31 5.2.3.1 Time Base Generator...........................32 5.2.3.2 Automatic Gain Control..........................32 5.2.3.3 Asymmetry Correction Circuitry (ASC)....................32 5.2.3.4 Analog Anti-Aliasing Low Pass Filter.......................32 5.2.3.5 Analog to Digital Converter (ADC) and FIR ....................32 ..........................34 ERVO YSTEM ..................... 34 EAD AND RITE PERATIONS 5.4.1...
  • Page 5 6.4.4 Execute Device Diagnostics (90h) ................... 56 6.4.5 Flush Cache (E7h, EAh:extended) ..................57 6.4.6 Format Track (50h)........................57 6.4.7 Identify Device (ECh)....................... 57 6.4.8 Idle (97h,E3h) .......................... 64 6.4.9 Idle Immediate (95h,E1h) ......................64 6.4.10 Initialize Device Parameters (91h) ..................64 6.4.11 Read Buffer (E4h) ........................
  • Page 6 6.6.3 Non-Data Commands....................... 90 6.6.4 DMA Data Transfer Commands ....................91 6.6.4.1 Normal DMA transfer ..........................92 6.6.4.2 Aborted DMA transfer ..........................92 6.6.4.3 Aborted DMA Command ...........................92 ............................. 93 IMING 6.7.1 Register transfers ........................93 6.7.2 PIO data transfers........................95 6.7.3 Multiword DMA data transfer....................
  • Page 7 TABLE OF TABLES Table 3-1 Specifications..........................6 Table 3-2 Physical Specifications ......................7 Table 3-3 Logical Configurations ......................7 Table 3-4 Performance Specifications....................... 8 Table 3-5 Power Requirements ......................... 9 Table 3-6 Environmental Specifications ....................10 Table 3-7 Reliability Specifications ......................11 Table 4-1 Power Connector Pin Assignment ..................
  • Page 8 TABLE OF FIGURES Figure 4-1 Mechanical Dimension ......................12 Figure 4-2 Mounting Dimensions (in Millimeters) ................. 14 Figure 4-3 Mounting-Screw Clearance ....................15 Figure 4-4 DC Power Connector, Configuration Jumper Block & AT-Bus Interface Connector (JHST) ..17 Figure 4-5 Jumper Pin Locations on the Drive PCBA ................19 Figure 4-6 Options for Jumper Block Configuration................

  • Page 9: Chapter 1 Scope

    CHAPTER 1 SCOPE Welcome to the SpinPoint P80 series of Samsung hard disk drives. This series of drives consists of the following models: SP0401N, SP0802N, SP1203N and SP1604N. This chapter provides an overview of the contents of this manual, including the intended user, manual organization, terminology and conventions. In addition, it provides a list of references that might be helpful to the reader.

  • Page 10: Terminology And Conventions

    SCOPE Terminology and Conventions The following abbreviations are used in this manual: µinches Microinches(10 inches) µs Microseconds Bits per inch Decibels Flux changes per inch Gigabytes Hertz Kbytes Kilobytes Pounds Meter Milliampere Megabytes Mbit/s Megabits per second Mbytes/s Megabytes per second Megahertz Millinches Milliseconds...

  • Page 11: Reference

    SCOPE • Parameters Parameters are given as initial capitals when spelled out and as all capitals when abbreviated. For example: Prefetch Enable: PE Cache Enable: • Names of Bits and Registers Bit names and register names are presented in initial capitals. For example: Host Software Reset Sector Count Register •...

  • Page 12: Chapter 2 Description

    Introduction The Samsung SpinPoint P80 3.5 inch disk drives are high capacity, high performance random access storage devices, which use non-removable 3.5-inch disks as storage media. Each disk incorporates thin film metallic media technology for enhanced performance and reliability. And for each disk surface there is a corresponding movable head actuator assembly to randomly access the data tracks and write or read the user data.

  • Page 13: Standards And Regulations

    DESCRIPTION • Supports both CHS and LBA Addressing modes • Supports all logical geometries as programmed by the host • 2MB/8MB buffer memory for read and write cache. • Transparent media defect mapping • High performance in-line defective sector skipping •...

  • Page 14: Chapter 3 Specifications

    SPECIFICATIONS This chapter gives a detailed description of the physical, electrical, and environmental characteristics of the SpinPoint P80 hard disk drives. Specification Summary Table 3-1 Specifications DESCRIPTION SP0401N SP0802N SP1203N SP1604N Number of Disks Number of R/W heads Maximum recording density (Kbpi)

  • Page 15: Physical Specifications

    SPECIFICATIONS Physical Specifications Table 3-2 Physical Specifications DESCRIPTION SP0401N SP0802N SP1203N SP1604N Physical dimensions: Length (inches) 5.75 Width (inches) 4.00 Height (inches) 1.00 Weight (lb) 1.39LB 1.39LB 1.44LB 1.44LB Logical Configurations Table 3-3 Logical Configurations DESCRIPTION SP0401N SP0802N SP1203N SP1604N...

  • Page 16: Performance Specifications

    SPECIFICATIONS Performance Specifications Table 3-4 Performance Specifications DESCRIPTION SP0401N SP0802N SP1203N SP1604N Seek Time (Rd/Wt, typical): Average seek time 8.9/10.0 ms Track to track seek time 0.8/1.0 ms Full stroke seek time 18/19 ms Data Transfer Rate: (Maximum) buffer to/from media...

  • Page 17: Power Requirements

    SPECIFICATIONS Power Requirements Table 3-5 Power Requirements Typical Current (mA rms) Typical Power Mode +12 Volts +5 Volts (Watts) Spin-up(1/2 Disk) 600/600 1900/1900 Normal 600/600 300/400 6.6/7.8 Idle 480/480 300/400 6.0/7.2 Random Seek 7.8/9.0 Read/Write 6.8/8.0 Standby 0.3/0.3 Sleep 0.3/0.3 1) Random seek: 30% Duty cycle seek commands with logical random location.

  • Page 18: Environmental Specifications

    SPECIFICATIONS Environmental Specifications Table 3-6 Environmental Specifications DESCRIPTION SP0401N SP0802N SP1203N SP1604N (The Temp of Drive should be below 60C @ Ambient Condition) Ambient Temperature: 5 ∼ 55°C Operating -40 ∼ 70°C Non-operating Max. gradient (Temperature/Humidity) 20°C/15%/hr Relative Humidity (non condensing)

  • Page 19: Reliability Specifications

    SPECIFICATIONS Table 3-6 Environmental Specifications (continued) DESCRIPTION SP0401N SP0802N SP1203N SP1604N Shock (1/2 sine pulse); Operating 2.0 ms 63G Read/63G Write Non-operating 2.0 ms 350G 1.0 ms 200G 0.5 ms 200G Rotational Shock Operating 2.0 ms 2K rad/sec Non-operating 2.0 ms...

  • Page 20: Chapter 4 Installation

    INSTALLATION CHAPTER 4 INSTALLATION This chapter describes how to unpack, mount, configure, and connect a SpinPoint P80 hard disk drive. It also describes how to install the drive in systems. Space Requirements Figure 4-1 shows the external dimensions of the drive. Figure 4-1 Mechanical Dimension SpinPoint P80 Product Manual Rev.

  • Page 21: Unpacking Instructions

    INSTALLATION Unpacking Instructions (1) Open the shipping container of the SpinPoint P80. (2) Lift the packing assembly that contains the drive out of the shipping container. (3) Remove the drive from the packing assembly. When you are ready to install the drive, remove it from the ESD (Electro Static Discharge) protection bag.

  • Page 22: Figure 4-2 Mounting Dimensions (In Millimeters)

    INSTALLATION Figure 4-2 Mounting Dimensions (in Millimeters) SpinPoint P80 Product Manual Rev. 01...

  • Page 23: Clearance

    INSTALLATION 4.3.2 Clearance The printed circuit board (PCB) is designed to be very close to the mounting holes. Do not exceed the specified length for the mounting screw described in Figure 4-3. The specified screw length allows full use of the mounting-hole threads, while avoiding damage or placing unwanted stress on the PCB.

  • Page 24: Ventilation

    INSTALLATION 4.3.3 Ventilation SpinPoint P80 hard disk drives are designed to operate without the need of a cooling fan, provided the ambient air temperature does not exceed 55ºC. Any user-designed cabinet must provide adequate air circulation to prevent exceeding the maximum temperature. Cable Connectors The Interface/Power connector consists of three portions;...

  • Page 25: Figure 4-4 Dc Power Connector, Configuration Jumper Block & At-Bus Interface Connector (Jhst)

    INSTALLATION Figure 4-4 DC Power Connector, Configuration Jumper Block & AT-Bus Interface Connector (JHST) SpinPoint P80 Product Manual Rev. 01...

  • Page 26: Jumper Block Configurations

    INSTALLATION Jumper Block Configurations This mode is selected as the factory default. It configures the drive as the Master. Master Mode Select this mode to configure the drive as the Slave. Slave Mode Select this mode if the Cable Select feature of the AT Bus Interface is to be used for Master / Slave selection.

  • Page 27: Figure 4-5 Jumper Pin Locations On The Drive Pcba

    INSTALLATION Figure 4-5 Jumper Pin Locations on the Drive PCBA Master Master Mode with 32GB Clip Slave Mode with 32GB Clip Slave Cable Select Cable Select Mode with 32GB Clip Figure 4-6 Options for Jumper Block Configuration SpinPoint P80 Product Manual Rev. 01...

  • Page 28: Drive Installation

    INSTALLATION Drive Installation The SpinPoint P80 hard disk drive can be installed in an AT-compatible system in two ways: • To install the drive with a motherboard that contains a 40-pin AT-bus connector, connect the drive to the motherboard using a 40-conductor or a 80-conductor ribbon cable. Ensure that pin 1 of the drive is connected to pin 1 of the motherboard connector.

  • Page 29: System Startup Procedure

    2. Typically the system will detect a configuration change automatically. If so, then jump to step 6. 3. If installing SpinPoint SP0401N, SP0802N, SP1203N, & SP1604N model and the system hangs during boot up,(or bios does not detect the drive), follow the instructions in section “4.7.1 Drive Installation to Access the Full Capacity Using 32GB Clip”.

  • Page 30: Drive Installation To Access The Full Capacity Using 32Gb Clip

    INSTALLATION type. • Maximum number of logical cylinders in CHS mode is 16,383. • Systems that incorporate more than an 8.4GB per storage device must access the drive in LBA addressing mode. • Windows 95 or 98 that use FAT16 file system will limit the drive’s logical partition at 2.1GB per logical drive.

  • Page 31: Drive Installation To Access The Over Than 128Gb(Or 137Gb)

    INSTALLATION In case the system can not support 48-bit LBA BIOS, please contact system maker or chipset maker. It may be possible to download new BIOS for 48-bit LBA support. If the system hardware supports 48-bit LBA, 128GB or 137GB capacity is accessible with Windows XP and Windows 2000 after installing Microsoft Service Pack-1 and 3 individually.

  • Page 32: Chapter 5 Disk Drive Operation

    DISK DRIVE OPERATION CHAPTER 5 DISK DRIVE OPERATION This chapter describes the operation of the SpinPoint P80 functional subsystems. It is intended as a guide to the operation of the drive, rather than a detailed theory of operation. Head / Disk Assembly (HDA) A SpinPoint P80 hard disk drive consists of a mechanical sub-assembly and a printed circuit board assembly (PCBA), as shown in Figure 5-1.

  • Page 33: Figure 5-1 Exploded Mechanical View

    Figure 5-1 Exploded Mechanical View SpinPoint P80 Product Manual Rev. 01...

  • Page 34: Disk Stack Assembly

    Heads fly very close to the disk surfaces. Therefore, it is very important that air circulating within the drive be maintained free of particles. Samsung HDAs are assembled in a purified air environment to ensure cleanliness and then sealed with a gasket. To retain this clean air environment, the SpinPoint P80 is equipped with a re-circulating filter, which is located in the path of the airflow close to the rotating disk and is designed to trap any particles that may develop inside HDA.

  • Page 35: Drive Electronics

    5.2 Drive Electronics SpinPoint P80 drives attain their intelligence and performance through the specialized electronic components mounted on the PCBA. The components are mounted on one side of the PCBA. The Preamplifier IC is the only electrical component that is not on the PCBA. It is mounted on the flexible circuit inside the HDA.
  • Page 36 DISK DRIVE OPERATION kzw j–™Œ p•›Œ™ˆŠŒ kzw j–™Œ p•›Œ™ˆŠŒ j–•›™–“ iœŒ™ kš’ o–š› p•›Œ™ˆŠŒ j–•›™–“ j–•›™–“ j–•›™–“ kš’ ljj j–•›™–“ iœŒ™ tŒ”–™  p•›Œ™ˆŠŒ Figure 5-2 88I5522 AT Controller Block Diagram SpinPoint P80 Product Manual Rev. 01...

  • Page 37: The Host Interface Control Block

    5.2.2.1 The Host Interface Control Block The 88I5522 AT Controller provides an ATA interface to the host computer and can attach to an ATA-1, 2,3,4,5,6 or ATA-7 host. It provides a means for the host to access the Task File registers used to control the transfer of data between host memory and the disk.

  • Page 38: The Buffer Control Block

    DISK DRIVE OPERATION • Support for Master/Slave configuration of two embedded disk controller drives. • Automatic detection of Host status reads. • Support of both LBA and CHS Task File registers formats. • Automatic detection of both the software AT reset and hardware AT reset. •...

  • Page 39: The Disk Ecc Control Block

    operations. Once the Disk Sequencer is started, it executes each word in logical order. At the completion of the current instruction word, it either continues to the next instruction, continues to execute some other instruction based upon an internal or external condition having been met, or it stops. During instruction execution or while stopped, registers can be accessed by the DSP to obtain status information reflecting the Disk Sequencer operations taking place.

  • Page 40: Time Base Generator

    DISK DRIVE OPERATION The read/write channel functions include a time base generator, AGC circuitry, asymmetry correction circuitry (ASC), analog anti-aliasing low-pass filter, analog to digital converter (ADC), digital FIR filter, timing recovery circuits, Viterbi detector, sync mark detection, 32/34 rate block code ENDEC, serializer and de-serializer, and write pre-compensation circuits.
  • Page 41 Figure 5-3 Read/Write 88C5520+ SpinPoint P80 Product Manual Rev. 01...

  • Page 42: Servo System

    DISK DRIVE OPERATION 5.3 Servo System The Servo System controls the position of the read/write heads and holds them on track during read/write operations. The Servo System also compensates for MR write/read offsets and thermal offsets between heads on different surfaces and for vibration and shock applied to the drive. The SpinPoint P80 is an Embedded Sector Servo System.

  • Page 43: The Write Channel

    88C5520+ decodes the 32/34 with post-processor format to produce a serial bit stream. This NRZ (Non Return to Zero) serial data is converted to 8-bit bytes. The Sequencer module identifies the data as belonging to the target sector. After a full sector is read, the 88I5522 checks to see if the firmware needs to apply an ECC algorithm to the data.

  • Page 44: Write Caching

    DISK DRIVE OPERATION automatically read and store the following data from the disk into fast RAM. If the host requests this data, the RAM is accessed rather than the disk. There is a high probability that subsequent data requested will be in the cache, because more than 50 percent of all disk requests are sequential.

  • Page 45: Defect Management

    If the sector is not automatically relocated, the drive drops out of write caching and reports the error as an ID Not Found. If the write command is still active on the AT interface, the error is reported during that command.

  • Page 46: Chapter 6 At Interface And Ata Commands

    AT INTERFACE AND ATA COMMANDS Introduction A Samsung disk drive with an Embedded AT Interface fully supports and enhances PC mass storage requirements. The Samsung AT interface conforms to the ATA/ATAPI-7 standards in Cabling, in Physical Signals, and in Logical Programming schemes. The Samsung Embedded AT controller joins the industry premiere VLSI circuitry with ingenious programming skill that does not compromise performance or reliability.

  • Page 47: Signal Descriptions

    6.2.3 Signal Descriptions The interface signals and pins are described below and listed in Table 6-1. The signals are listed according to function, rather than in numerical connector pin order. 6.2.3.1 CS1FX- (Drive Chip Select 0) This is the chip select signal decoded from the host address bus used to select the Command Block registers. 6.2.3.2 CS3FX- (Drive Chip Select 1) This is the chip select signal decoded from the host address bus used to select the Control Block registers.

  • Page 48: Dmack- (Dma Acknowledge)

    DISK DRIVE OPERATION 6.2.3.8 DMACK- (DMA Acknowledge) This signal shall be used by the host in response to DMARQ to either acknowledge that data has been accepted, or that data is available. 6.2.3.9 DMARQ (DMA Request) This signal, used for DMA data transfers between host and drive, shall be asserted by the drive when it is ready to transfer data to or from the host.

  • Page 49: Iordy (I/O Channel Ready)

    6.2.3.12 IORDY (I/O Channel Ready) This signal is active low to extend the host transfer cycle of any host register access (Read or Write) when the drive is not ready to respond to a data transfer request. When IORDY is not negated, this signal is in the high impedance state.

  • Page 50: Table 6-1 At-Bus Interface Signals

    DISK DRIVE OPERATION Table 6-1 AT-Bus Interface Signals Drive Connector Direction AT System BUS Signal Name Pin No. ← RESET- RESET DRV  Ground Ground ←→ ←→ ←→ ←→ ←→ ←→ DB10 SD10 ←→ ←→ DB11 SD11 ←→ ←→ DB12 SD12 ←→...
  • Page 51 Table 6-1 AT-Bus Interface Signals (continued) Drive Connector Direction AT System BUS Signal Name Pin No. → DMARQ DMARQ  Ground Ground ← IOW- IOW-  Ground Ground ← IOR- IOR-  Ground Ground → IORDY IORDY Reserved No Connection ←...

  • Page 52: Table 6-2 Interface Signals Description

    DISK DRIVE OPERATION Table 6-2 lists the signal name mnemonic, connector pin number, whether input to (I) or output from (O) the drive, and the full signal name. Table 6-2 Interface Signals Description Signal Description CS1FX- Drive chip Select 0 CS3FX- Drive chip Select 1 Drive Address Bus - Bit 0...

  • Page 53: Logical Interface

    Logical Interface 6.3.1 General 6.3.1.1 Bit Conventions Bit names are shown in all upper case letters except where a lower case n precedes a bit name. This indicates that when nBIT=0 (bit is zero) the action is true, and when nBIT=1 (bit is one) the action is false. If there is no proceeding n, then when BIT=1 it is true, and when BIT=0 it is false.
  • Page 54 DISK DRIVE OPERATION In LBA mode the sectors on the device are assumed to be linearly mapped with an initial definition of: LBA 0 = (Cylinder 0, head 0, sector 1). Irrespective of translate mode geometry set by the host, the LBA address of a given sector does not change: LBA = [(cylinder * heads_per_cylinder + heads) * sectors_per_track] + sector - 1 SpinPoint P80 Product Manual Rev.

  • Page 55: I/O Register - Address

    6.3.2 I/O Register - Address Communication to or from the drive is through an I/O register that routes the input or output data to or from registers addressed by a code on signals from the host (CS1FX-, CS3FX-, DA2, DA1, DA0, DIOR- and DIOW-).

  • Page 56: Control Block Register Descriptions

    DISK DRIVE OPERATION 6.3.3 Control Block Register Descriptions 6.3.3.1 Alternate Status Register (3F6h) This register contains the same information as the Status register in the Command Block register. The only difference is that reading this register does not imply interrupt acknowledgment nor does it clear a pending interrupt.

  • Page 57: Command Block Register Descriptions

    6.3.4 Command Block Register Descriptions 6.3.4.1 Data Register (1F0h) This 16-bit register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command. Data transfers may be either PIO or DMA.

  • Page 58: Sector Count Register (1F2H)

    DISK DRIVE OPERATION 6.3.4.5 Sector Count Register (1F2h) This register contains the number of sectors of data requested to be transferred on a read or write operation between the host and the drive. If the value in this register is zero, a count of 256 sectors is specified. If this register is zero at command completion, the command was successful.

  • Page 59: Status Register (1F7H)

    6.3.4.10 Status Register (1F7h) This register contains the drive status. The contents of this register are updated at the completion of each command. When BSY is cleared, the other bits in this register are valid within 400 nsec. If BSY=1, no other bits in this register are valid.

  • Page 60: At Command Register Descriptions

    DISK DRIVE OPERATION AT Command Register Descriptions Commands are issued to the drive by loading the pertinent registers in the command block with the needed parameters, and then writing the command code to the Command register. The manner in which a command is accepted varies.

  • Page 61: Table 6-4 Command Codes And Parameters

    Table 6-4 Command Codes and Parameters COMMAND PARAMETER USED Class DESCRIPTION CODE Check Power Mode 98h, E5h Download Micro code Device Configuration Overlay Execute Device Diagnostic Flush Cache Flush Cache Extended Format Track Identify Device Idle 97h, E3h Idle Immediate 95h, E1h Initialize Drive Parameter Read Buffer...
  • Page 62 DISK DRIVE OPERATION Table 6-4 Command Codes and Parameters (continued) COMMAND PARAMETER USED Class DESCRIPTION CODE Seek Set Features Set Max Address Set Max Address Extended Set Multiple Mode Sleep Mode 99h, E6h Smart Standby 96h, E2h Standby Immediate 94h, E0h Write Buffer Write DMA (w/retry) Write DMA (w/o retry)

  • Page 63: Check Power Mode (98H, E5H)

    6.4.1 Check Power Mode (98h, E5h) This command checks the power mode. If the drive is in, going to, or recovering from the Standby Mode, the drive sets BSY, sets the Sector Count register to 00h, clears BSY, and generates an interrupt. If the drive is in the Idle Mode, the drive sets BSY, sets the Sector Count register to FFh, clears BSY, and generates an interrupt.

  • Page 64: Execute Device Diagnostics (90H)

    DISK DRIVE OPERATION selectable capabilities. The DEVICE CONFIGURATION SET command allows a device manufacturer or a personal computer system manufacturer to reduce the set of optional commands, modes, or feature sets supported by a device as indicated by a DEVICE CONFIGURATION IDENTIFY command. The DEVICE CONFIGURATION SET command transfers an overlay that modifies some of the bits set in words 63, 82, 83, 84, and 88 of the IDENTIFY DEVICE command response.

  • Page 65: Flush Cache (E7H, Eah:extended)

    Table 6-6 Diagnostic Codes Code Description No error detected Formatter device error Sector buffer error ECC circuitry error Controlling microprocessor error Drive 1 failed 6.4.5 Flush Cache (E7h, EAh:extended) This command is used by the host to request the drive to flush the write cache. If write is to be flushed, all data cached will be written to the media.

  • Page 66: Table 6-7 Identify Device Information

    DISK DRIVE OPERATION Some parameters are defined as a group of bits. A word which is defined as a set of bits is transmitted with the indicated bits on the respective data bus bit (e.g., bit 15 appears on DD15). Some parameters are defined as a sixteen-bit value.
  • Page 67 Table 6-7 IDENTIFY DEVICE information (continued) Word Content Description Capabilities 15-14 Reserved 1=Standby timer values as specified in this standard are supported 0=Standby timer values shall be managed by the device Reserved 2F00h 1=IORDY supported 0=IORDY may be supported 1=IORDY may be disabled Shall be set to one.
  • Page 68 DISK DRIVE OPERATION Table 6-7 IDENTIFY DEVICE information (continued) Word Content Description Command set supported. Obsolete 1=NOP command supported 1=READ BUFFER command supported 1=WRITE BUFFER command supported Obsolete 1=Host Protected Area feature set supported 1=DEVICE RESET command supported 346Bh 1=SERVICE interrupt supported 1=Release interrupt supported 1=Look-ahead supported 1=Write cache supported...
  • Page 69 1=DEVICE RESET command enabled 1=SERVICE interrupt enabled 1=Release interrupt enabled 1=Look-ahead enabled 1=Write cache enabled 1=PACKET Command feature set enabled 1=Power Management feature set enabled 1=Removable Media feature set enabled 1=Security Mode feature set enabled 1=SMART feature set enabled (continued) SpinPoint P80 Product Manual Rev.
  • Page 70 DISK DRIVE OPERATION Table 6-7 IDENTIFY DEVICE information (continued) Word Content Description Command set/feature enabled. . (The default manufacturing setting is as below) 15-14 Reserved 1=Flush Cache Ext supported 1=Flush Cache supported 1=Device Configuration Overlay features supported 1=48 bit address feature supported 1-Automatic Acoustic feature enabled 1=Set Max Security feature enabled by Set Max Set Password 0001h...
  • Page 71 15-14 (=01) Word 93 is valid 1=device detected CBLID- above V 0=device detected CBLID- below V 12-9 (=0) Reserved (=1) Shall be set to one. (=0) Reserved (=1) Shall be set to one. XXXXh 15-8 Vendor’s recommended AAM value. Current AAM value 95-99 0000h Reserved...

  • Page 72: Idle (97H,E3H)

    DISK DRIVE OPERATION 6.4.8 Idle (97h,E3h) This command causes the drive to set BSY, enter the Idle Mode, clear BSY, and generate an interrupt. The interrupt is generated even though the drive may not have fully transitioned to Idle Mode. If the drive is already spinning, the spin-up sequence is not executed.

  • Page 73: Read Buffer (E4H)

    The sector count and head values are not checked for validity by this command. If they are invalid, no error will be posted until an illegal access is made by some other command. 6.4.11 Read Buffer (E4h) The Read Buffer command enables the host to read the current contents of the drive's sector buffer. When this command is issued, the drive sets BSY, sets up the sector buffer for a read operation, sets DRQ, clears BSY, and generates an interrupt.

  • Page 74: Read Multiple Command (C4H, 29H:extended)

    DISK DRIVE OPERATION 6.4.15 Read Multiple Command (C4h, 29h:extended) The Read Multiple command performs similarly to the Read Sectors command. Interrupts are not generated on every sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple command.

  • Page 75: Read Native Max Address (F8H, 27H:extended)

    6.4.16 Read Native Max Address (F8h, 27h:extended) This command returns the native maximum address. The native maximum address is the highest address accepted by the device in the factory default condition. The native maximum address is the maximum address that is valid when using the SET MAX ADDRESS command. Normal Output: Sector Number - maximum native sector number (IDENTIFY DEVICE word 6) or LBA bits (7:0) for native max...

  • Page 76: Read Verify Sector(S) (40H:with Retry, 41H:without Retry, 41H:extended)

    DISK DRIVE OPERATION 6.4.18 Read Verify Sector(s) (40h:with retry, 41h:without retry, 41h:extended) This command is identical to the Read Sectors command, except that DRQ is never set, and no data is transferred to the host. See 6.6.3 for the protocol. When the command is accepted, the drive sets BSY. When the requested sectors have been verified, the drive clears BSY and generates an interrupt.

  • Page 77: Security Erase Unit (F4H)

    6.4.22 Security Erase Unit (F4h) This command transfers 512 bytes of data from the host. Table 6-10 defines the content of this information. If the password does not match the password previously saved by the device, the device shall reject the command with command aborted.

  • Page 78: Security Unlock (F2H)

    DISK DRIVE OPERATION Table 6-12 Identifier and security level bit interaction Identifier Level Command result User High The password supplied with the command shall be saved as the new User password. The Lock mode shall be enabled from the next power- on or hardware reset.

  • Page 79: Set Features (Efh)

    6.4.27 Set Features (EFh) This command is used by the host to establish the following parameters, which affect the execution of certain drive features as shown in Table 6-13. Table 6-13 Set Feature Register Definitions Code Description Enable Write Cache Set transfer mode based on value in Sector Count register Disable Retry Enable Automatic Acoustic management feature set.

  • Page 80: Set Max Address (F9H, 37H:extended)

    DISK DRIVE OPERATION 6.4.28 Set Max Address (F9h, 37h:extended) Host Protected Area feature set. Inputs Register Features Sector Count Native max address sector number or SET MAX LBA Sector Number SET MAX cylinder low or LBA Cylinder Low SET MAX cylinder high or LBA Cylinder High Native max address head number or Device/Head...
  • Page 81 Status register – BSY shall be cleared to zero indicating command completion. DRDY shall be set to one. DF (Device Fault) shall be cleared to zero. DRQ shall be cleared to zero. ERR shall be cleared to zero. Description After successful command completion, all read and write access attempts to addresses greater than specified by the successful SET MAX ADDRESS command shall be rejected with an IDNF error.

  • Page 82: Set Multiple Mode (C6H)

    DISK DRIVE OPERATION 6.4.29 Set Multiple Mode (C6h) This command enables the drive to perform Read and Write Multiple operations and establishes the block count for these commands. Refer to section 6.6.3 for the protocol. The Sector Count register is loaded with the number of sectors per block. Drives support block sizes of 2, 4, 8, and 16 sectors.

  • Page 83: Standby (96H, E2H)

    6.4.31 Standby (96h, E2h) This command causes the drive to set BSY, enter the Standby Mode, clear BSY, and assert INTRQ. INTRQ is asserted even though the device may not have fully transitioned to Standby Mode. If the Sector Count register is non-zero, then the Standby Timer is enabled. The value in the Sector Count register shall be used to determine the time programmed into the Standby Mode.

  • Page 84: Smart Enable/Disable Attribute Autosave (D2H)

    DISK DRIVE OPERATION 6.4.32.2 Smart enable/disable attribute autosave (D2h) This command enables and disables the optional attribute autosave feature of the device. Depending upon the implementation, this command may either allow the device, after some vendor specified event, to automatically save its updated attribute values to non-volatile memory; or this command may cause the autosave feature to be disabled.

  • Page 85: Smart Read Data (D0H)

    If the device is in the process of performing its off-line data collection activities and is interrupted by a STANDBY IMMEDIATE command from the host, the device shall suspend or abort its off-line data collection activities, and service the host within two seconds after receipt of the command. After receiving a new command that causes the device to exit a power saving mode, the device shall initiate or resume off-line data collection activities without any additional commands from the host unless the device aborted these activities.

  • Page 86: Table 6-17 Off-Line Data Collection Status Values

    DISK DRIVE OPERATION Table 6-17 Off-line data collection status values Value Definition 00h or 80h Off-line data collection activity was never started. Reserved 02h or 82h Off-line data collection activity was completed without error. Reserved 04h or 84h Off-line data collection Activity was suspended by an interrupting command from host 05h or 85h Off-line data collection Activity was aborted by an interrupting command from host 06h or 86h...

  • Page 87: Smart Read Log Sector (D5H)

    SMART capability The following describes the definition for the SMART capability bits. If the value of all of these bits is equal to zero, then this device does not implement automatic saving of SMART data. • Bit 0 (power mode SMART data saving capability bit) – If the value of this bit equals one, the device shall save its SMART data prior to going into a power saving mode (Idle, Standby, or Sleep) or immediately upon return to Active or Idle mode from a Standby mode.

  • Page 88: Standby (96H, E2H)

    DISK DRIVE OPERATION 6.4.33 Standby (96h, E2h) This command causes the drive to enter Standby Mode. See 6.6.3 for the protocol. The drive may return the interrupt before the transition to Standby Mode is completed. If the drive is already spun down, the spin down sequence is not executed. 6.4.34 Standby Immediate (94h, E0h) This command causes the drive to enter Standby Mode.

  • Page 89: Write Multiple Command (C5H, 39H:extended)

    6.4.38 Write Multiple Command (C5h, 39h:extended) This command is similar to the Write Sectors command. The drive sets BSY within 400 nsec of accepting the command, and interrupts are not presented on each sector but on the transfer of a block which contains the number of sectors defined by Set Multiple.
  • Page 90 DISK DRIVE OPERATION If the ID is read correctly, the data loaded in the buffer is written to the data field of the sector, followed by the ECC bytes. Upon command completion, the Command Block registers contain the cylinder, head, and sector number of the last sector written in CHS mode or the logical block address in LBA mode.

  • Page 91: Programming Requirements

    Programming Requirements 6.5.1 Reset Response A reset is accepted within 400 nsec after the negation of RESET- or within 400 nsec after SRST has been set in the Device Control register. When the drive is reset by RESET-, Drive 1 indicates it is present by asserting DASP- within 400 msec, and DASP- remains asserted for 30 seconds or until Drive 1 accepts the first command.

  • Page 92: Table 6-18 Command Errors

    DISK DRIVE OPERATION Table 6-18 Command Errors Error Register Status Register Command UNC IDNF ABRT TK0NF AMNF DRDY DWF DSC CORR ERR Check Power Mode Download Micro Code Execute Drive Diags Flush Cache Format Track Identify Drive Idle Idle Immediate Initialize Drive Parms Read Buffer Read DMA...

  • Page 93: Power Conditions

    6.5.3 Power Conditions SpinPoint drives reduce the power required to operate (see Table 6-19), which describes each operating mode and the status of the major components. Table 6-19 Power Saving Mode MODE Spindle Servo Interface Pre Amp SLEEP Disk OFF Host OFF STANDBY Disk OFF...

  • Page 94: Normal Mode

    DISK DRIVE OPERATION 6.5.3.4 Normal mode In Normal mode, the drive is capable of responding immediately to media access requests, and commands complete execution in the shortest possible time. See specific power-related commands (Table 6-4). The power conditions in each mode are shown in Table 6-20. Table 6-20 Power Conditions MODE SRST...

  • Page 95: Protocol Overview

    Protocol Overview Commands can be grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host first checks if BSY=1, and should proceed no further unless and until BSY=0. For most commands, the host will also wait for DRDY=1 before proceeding.

  • Page 96: Pio Read Command

    DISK DRIVE OPERATION 6.6.1.1 PIO Read Command Setup Issue Read Transfer Read Transfer Command Status Data ===== Status Data BSY=0 BSY=1 BSY=0 BSY=1 BSY=0 BSY=1 DRDY=1 DRQ=1 DRQ=0 DRQ=1 DRQ=0 Assert Negate Assert Negate INTRQ INTRQ INTRQ INTRQ If Error Status is presented, the drive is prepared to transfer data, and it is at the host's discretion that the data is transferred.

  • Page 97: Pio Write Command

    Execution includes the transfer of one or more 512 byte (>512 bytes on Write Long) sectors of data from the drive to the host. a) The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder and Drive/Head registers.

  • Page 98: Non-Data Commands

    DISK DRIVE OPERATION 6.6.3 Non-Data Commands This class includes: • Check Power Mode (98h,E5h) • Flush Cache (E7h) • Execute Drive Diagnostic (DRDY=x) (90h) • Idle (97h,E3h) • Idle Immediate (95h,E1h) • Initialize Drive Parameters (DRDY=x) (91h) • NOP (00h) •...

  • Page 99: Dma Data Transfer Commands

    6.6.4 DMA Data Transfer Commands This class comprises: • Read DMA (C8h) • Write DMA (C9h) Data transfers using DMA commands differ in two ways from PIO transfers: • Data transfers are performed using the slave-DMA channel, • No intermediate sector interrupts are issued on multi-sector commands. Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands except that the host initializes the slave-DMA channel prior to issuing the command.

  • Page 100: Normal Dma Transfer

    DISK DRIVE OPERATION 6.6.4.1 Normal DMA transfer Initialize DMA Command DMA data transfer Reset DMA Status BSY=0 BSY=1 BSY=x BSY=1 BSY=0 DRQ=x nIEN=0 6.6.4.2 Aborted DMA transfer Initialize DMA Command DMA data Reset DMA Status BSY=0 BSY=1 BSY=x BSY=1 BSY=0 DRQ=1 nIEN=0 6.6.4.3...

  • Page 101: Timing

    Timing The minimum cycle time supported by the device in PIO mode 3, 4 and Multiword DMA mode 1, 2 respectively, shall always be greater than, or equal to the minimum cycle time defined by the associated mode. For example, a device supporting PIO mode 4 timing shall not report a value less than 120ns, the minimum cycle time defined for PIO mode 4 timings.

  • Page 102: Figure 6-1 Register Transfer To/From Device

    DISK DRIVE OPERATION ADDR valid (See note 1) DIOR-/DIOW- WRITE DD(7:0) (See note 2) READ DD(7:0) (See note 2) IORDY (See note 3,3-1) IORDY (See note 3,3-2) IORDY (See note 3,3-3) NOTES − 1 Device address consists of signals CS0-, CS1- and DA(2:0) 2 Data consists of DD(7:0).

  • Page 103: Pio Data Transfers

    Table 6-21 Register transfer to/from device Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Note PIO timing parameters Cycle time (min) Address valid to DIOR-/DIOW- setup (min) DIOR-/DIOW- pulse width 8-bit (min) DIOR-/DIOW- recovery time (min) DIOW- data setup (min) DIOW- data hold (min)

  • Page 104: Figure 6-2 Pio Data Transfer To/From Device

    DISK DRIVE OPERATION ADDR valid (See note 1) DIOR-/DIOW- WRITE DD(15:0) (See note 2) READ DD(15:0) (See note 2) IORDY (See note 3,3-1) IORDY (See note 3,3-2) IORDY (See note 3,3-3) NOTES − 1 Device address consists of signals CS0-, CS1- and DA(2:0) 2 Data consists of DD(15:0).

  • Page 105: Table 6-22 Pio Data Transfer To/From Device

    Table 6-22 PIO data transfer to/from device PIO timing parameters Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Note Cycle time (min) Address valid to DIOR-/DIOW- setup (min) DIOR-/DIOW- 16-bit (min) DIOR-/DIOW- recovery time (min) DIOW- data setup (min) DIOW- data hold (min)

  • Page 106: Multiword Dma Data Transfer

    DISK DRIVE OPERATION 6.7.3 Multiword DMA data transfer Figure 6-3 defines the timings associated with Multiword DMA transfers. For Multiword DMA modes 1 and above, the minimum value of t is specified by word 65 in the IDENTIFY DEVICE parameter list. Table 6-23 defines the minimum value that shall be placed in word 65. Devices shall power up with mode 0 as the default Multiword DMA mode.

  • Page 107: Table 6-23 Multiword Dma Data Transfer

    Table 6-23 Multiword DMA data transfer Multiword DMA timing parameters Mode 0 Mode 1 Mode 2 Note Cycle time (min) see note DIOR-/DIOW- (min) see note DIOR- data access (max) DIOR- data hold (min) DIOR-/DIOW- data setup (min) DIOW- data hold (min) DMACK to DIOR-/DIOW- setup (min)

  • Page 108: Ultra Dma Data Transfer

    DISK DRIVE OPERATION 6.7.4 Ultra DMA data transfer Figures 6-4 through 6-13 define the timings associated with all phases of Ultra DMA bursts. Table 6-24 contains the values for the timings for each of the Ultra DMA modes. 6.7.4.1 Initiating an Ultra DMA data in burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2.

  • Page 109: Ultra Dma Data Burst Timing Requirements

    6.7.4.2 Ultra DMA data burst timing requirements Table 6-24 Ultra DMA data burst timing requirements Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Comment Name (ns) (ns) (ns) (ns) (ns) (ns) (ns) (see Notes 1 and 2) min max min max min max min max min max min...

  • Page 110: Sustained Ultra Dma Data In Burst

    DISK DRIVE OPERATION Table 6-24 Ultra DMA data burst timing requirements (cont). NOTES − 1 Timing parameters shall be measured at the connector of the sender or receiver to which the parameter applies. For example, the sender shall stop generating STROBE edges t after the negation of DMARDY-.

  • Page 111: Host Pausing An Ultra Dma Data In Burst

    6.7.4.4 Host pausing an Ultra DMA data in burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) HDMARDY- (host) DSTROBE (device) DD(15:0) (device) NOTES − 1 The host may assert STOP to request termination of the Ultra DMA burst no sooner than after HDMARDY- is negated.

  • Page 112: Device Terminating An Ultra Dma Data In Burst

    DISK DRIVE OPERATION 6.7.4.5 Device terminating an Ultra DMA data in burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) HDMARDY- (host) IORDYZ DSTROBE (device) DD(15:0) DA0, DA1, DA2, CS0-, CS1- NOTE −...

  • Page 113: Host Terminating An Ultra Dma Data In Burst

    6.7.4.6 Host terminating an Ultra DMA data in burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) HDMARDY- (host) IORDYZ DSTROBE (device) DD(15:0) DA0, DA1, DA2, CS0-, CS1- NOTE −...

  • Page 114: Initiating An Ultra Dma Data Out Burst

    DISK DRIVE OPERATION 6.7.4.7 Initiating an Ultra DMA data out burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) ZIORDY DDMARDY- (device) HSTROBE (host) DD(15:0) (host) DA0, DA1, DA2, CS0-, CS1- NOTE −...

  • Page 115: Sustained Ultra Dma Data Out Burst

    6.7.4.8 Sustained Ultra DMA data out burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. 2CYC 2CYC HSTROBE at host DD(15:0) at host HSTROBE at device DD(15:0) at device NOTE − DD(15:0) and HSTROBE signals are shown at both the device and the host to emphasize that cable settling time as well as cable propagation delay shall not allow the data signals to be considered stable at the device until some time after they are driven by the host.

  • Page 116: Device Pausing An Ultra Dma Data Out Burst

    DISK DRIVE OPERATION 6.7.4.9 Device pausing an Ultra DMA data out burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) DDMARDY- (device) HSTROBE (host) DD(15:0) (host) NOTES −...

  • Page 117: Host Terminating An Ultra Dma Data Out Burst

    6.7.4.10 Host terminating an Ultra DMA data out burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) IORDYZ DDMARDY- (device) HSTROBE (host) DD(15:0) (host) DA0, DA1, DA2, CS0-, CS1- NOTE −...

  • Page 118: Device Terminating An Ultra Dma Data Out Burst

    DISK DRIVE OPERATION 6.7.4.11 Device terminating an Ultra DMA data out burst The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2. DMARQ (device) DMACK- (host) STOP (host) IORDYZ DDMARDY- (device) HSTROBE (host) DD(15:0) (host) DA0, DA1, DA2, CS0-, CS1-...

  • Page 119: Chapter 7 Maintenance

    Service And Repair The service and repair of the SpinPoint P80 can be done at a Samsung Service Center. Please contact your representative for warranty information and service/return procedures. SpinPoint P80 Product Manual Rev. 01...

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